A fully differential folded cascode CMOS OP amp is combined with an adaptive bias OTA to increase the slew rate, and a continuous-time CMFB circuit with a push-pull type combination of a NMOS input and a PMOS input differential amplifiers is used to maximize the output voltage swing. The fabricated OP amp using a 0.8 µm digital CMOS process gives more than three times improvement in slew rate with a 15% increase in DC power consumption and a 7.5% increase in chip area compared to the conventional OP amp fabricated on the same die. The output voltage swing was measured to be -0.75 V -0.7 V at the supply voltage of +/-1.2 V.