Post-Silicon Tunable (PST) buffers are widely adopted in high-performance integrated circuits to fix timing violations introduced by process variations. In typical optimization procedures, the statistical timing analysis of the circuits with PST clock buffers will be executed more than 2000 times for large scale circuits. Therefore, the efficiency of the statistical timing analysis is crucial to the PST clock buffer optimization algorithms. In this paper, we propose a stochastic collocation based efficient statistical timing analysis method for circuits with PST buffers. In the proposed method, we employ the Howard algorithm to calculate the clock periods of the circuits on less than 100 deterministic sparse-grid collocation points. Afterwards, we use these obtained clock periods to derive the yield of the circuits according to the stochastic collocation theory. Compared with the state-of-the-art statistical timing analysis method for the circuits with PST clock buffers, the proposed method achieves up to 22X speedup with comparable accuracy.

Unmanned aerial vehicle (UAV)-assisted systems have attracted a lot of attention due to its high probability of line-of-sight (LoS) connections and flexible deployment. In this paper, we aim to minimize the upload time required for the UAV to collect information from the sensor nodes in disaster scenario, while optimizing the deployment position of UAV. In order to get the deployment solution quickly, a data-driven approach is proposed in which an optimization strategy acts as the expert. Considering that images could capture the spatial configurations well, we use a convolutional neural network (CNN) to learn how to place the UAV. In the end, the simulation results demonstrate the effectiveness and generalization of the proposed method. After training, our CNN can generate UAV configuration faster than the general optimization-based algorithm.