In this study, we investigated Si(100), Si(110) and Si(111) surface flattening process utilizing sacrificial oxidation method, and its effect on Metal-Insulator-Semiconductor (MIS) diode characteristics. By the etching of the 100 nm-thick sacrificial oxide formed by thermal oxidation at 1100°C, the surface roughness of Si(100), Si(110) and Si(111) substrates were reduced. The obtained Root-Mean-Square (RMS) roughness of Si(100) was reduced from 0.22 nm (as-cleaned) to 0.07 nm (after etching), while it was reduced from 0.23 nm to 0.12 nm in the case of Si(110), and from 0.23 nm to 0.11 nm in the case of Si(111), respectively. Furthermore, it was found that time-dependent dielectric breakdown (TDDB) characteristics of MIS diodes for p-Si(100), p-Si(110) and p-Si(111) were improved with the reduction of Si surface RMS roughness.

A YBCO/CeO2/Au MIS structure (YBCO:YBa2Cu3O7y) is fabricated on a MgO(100) substrate with the help of the all-in-situ electron-beam and heater coevaperation system. The current-voltage (I-V) characteristics of the deposited YBCO film under various gate voltages are examined. Small modulation of the I-V characteristics by gate voltages can be observed. Meanwhile, the surface morphology is also studied by means of an atomic force microscope (AFM). The relation between the field effect and the surface morphology of a thin YBCO film is discussed.