Quadrature voltage-controlled oscillators (VCOs) with current-weight-average and voltage-weight-average phase-adjusting architectures are studied. The phase adjusting equalizes the oscillation frequency to the LC-resonant frequency. The merits of the equalization are explained by using Leeson's phase noise equation and the impulse sensitivity function (ISF). Quadrature VCOs with the phase-adjusting architectures are fabricated using 180-nm TSMC CMOS and show low-phase-noise performances compared to a conventional differential VCO. The ISF analysis and small-signal analysis also show that the drawbacks of the current-weight-average phase-adjusting and voltage-weight-average phase-adjusting architectures are current-source noise effect and large additional capacitance, respectively. A voltage-average-adjusting circuit with a source follower at its input alleviates the capacitance increase.

This paper presents two ultra-low voltage and high performance VCO ICs with two novel transformer-based harmonic tuned tanks. The first proposed harmonic tuned tank effectively shapes the pseudo-square drain-node voltage waveform for close-in phase noise reduction. To compensate the voltage drop caused by the transformer, an improved second tank is proposed. It not only has tuned harmonic impedance but also provides a voltage gain to enlarge the output voltage swing over supply voltage limitation. The VCO with second tank exhibits over 3 dB better phase noise performance in 1/f2 region among all tuning range. The two VCO ICs are designed, fabricated and measured on wafer in 45-nm SOI CMOS technology. With only 0.3 V supply voltage, the proposed two VCO ICs exhibit best phase noise of -123.3 and -127.2 dBc/Hz at 10 MHz offset and related FoMs of -191.7 and -192.2 dBc/Hz, respectively. The frequency tuning ranges of them are from 14.05 to 15.14 GHz and from 14.23 to 15.68 GHz, respectively.

This paper presents a 20 GHz push-push VCO realized by a 10 GHz super-harmonic coupled quadrature oscillator for a quadrature 60 GHz frequency synthesizer. The output nodes are peaked by a tunable second harmonic resonator. The proposed VCO is implemented in 65 nm CMOS process. It achieves a tuning range of 3.5 GHz from 16.1 GHz to 19.6 GHz with a phase noise of -106 dBc/Hz at 1 MHz offset. The power consumption of the core oscillators is 10.3 mW and an FoM of -181.3 dBc/Hz is achieved.

Capacitive feedback VCOs use capacitors that are connected from the output node to the gate of the tail transistor that acts as a current source. Using such feedback results in modulating the current that is used by the oscillator and therefore changes its cyclostationary noise properties which results in a lower output phase noise. This paper presents a mathematical study of capacitive feedback VCOs in terms of stability and phase noise enhancement to confirm stability and to explain the enhancement in phase noise. The derived expression for the phase noise shows an improvement of 4.4 dB is achievable by using capacitive feedback as long as the VCO stays in the current limited region. Measurement results taken from an actual capacitive feedback VCO implemented in a 65 nm CMOS process also agrees with the analysis and simulation results which further validates the given analysis.

In this paper, using the Linear Time Variant (LTV) phase noise model and considering higher order harmonics generated by the oscillator output signal, a more general formula for transformation of the excess phase to the output signal is presented. Despite the basic LTV model which assumes that the total carrier power is within the fundamental harmonic, in the proposed model, the total carrier power is assumed to be distributed among all output harmonics. For the first harmonic, the developed expressions reduce to the basic LTV formulas. Simulation and experimental results are used to ensure the validity of the model.

This paper proposes a dual-conduction class-C VCO for ultra-low supply voltages. Two cross-coupled NMOS pairs with different bias points are employed. These NMOS pairs realize an impulse-like current waveform to improve the phase noise in the low supply conditions. The proposed VCO was implemented in a standard 0.18 µm CMOS technology, which oscillates at a carrier frequency of 4.5 GHz with a 0.2-V supply voltage. The measured phase noise is -104 dBc/Hz@1 MHz-offset with a power consumption of 114 µW, and the FoM is -187 dBc/Hz.

The effective ISFs of differential LC oscillators are derived under the assumption that the drain-to-source current is linearly dependent on the gate-to-source voltage for transistors operated in saturation. Moreover, a new interpretation of phase noise is given by examining the real vector diagram of the carrier signal, upon which the noise voltage induced by the impulse noise current is superimposed. The distinct feature of our vector diagram lies in that the noise voltage is always parallel with the horizontal axis. From the Fourier transformations of the derived effective ISFs, the phase noise of differential LC oscillators can be formulated with physical meanings in the frequency domain. The proposed theory can well describe the translation of the noise spectra when the noises from the LC-tank, the switching transistors, and the tail current source are converted into the phase noise. Theoretical predictions from our formulas agree well with the simulation results.

This paper presents a systemic analysis for phase noise performances of the series quadrature oscillator (QOSC) by using the time-variant impulse sensitivity function (ISF) model. The effective ISF for each noise source in the oscillator is derived mathematically. According to these effective ISFs, the explicit closed-form expression for phase noise due to the total thermal noise in the series QOSC is derived, and the phase noise contribution from the flicker noise in the regenerative and coupling transistors is also figured out. The phase noise contributions from the thermal noise and the flicker noise are verified by SpectreRF simulations.

This paper presents a systemic analysis for phase noise performances of differential cross-coupled LC oscillators by using Hajimiri and Lee's model. The effective impulse sensitivity functions (ISF) for each noise source in the oscillator is mathematically derived. According to these effective ISFs, the phase noise contribution from each device is figured out, and phase noise contributions from the device noise in the vicinity of the integer multiples of the resonant frequency, weighted by the Fourier coefficients of the effective ISF, are also calculated. The explicit closed-form expression for phase noise of the oscillator is definitely determined. The validity of the phase noise analysis is verified by good simulation agreement.