We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.

We have developed a new type of phase interpolation direct digital synthesizer (DDS) with a symmetrically structured delay generator. The new DDS is similar to a sine output DDS in that it produces lower spurious signals, but it does not require a sine look-up table. The symmetrically structured delay generator reduces the periodic jitter in the most significant bit (MSB) of the DDS accumulator. The symmetrical structure enables the delay generator to produce highly accurate delay timing and eliminates the need to adjust the circuit constants. Experimental results confirm frequency synthesizer operation in which the spurious signal level is reduced to less than that of the accumulator.