A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis

Hideyuki NOSAKA; Yo YAMAGUCHI; Akihiro YAMAGISHI; Masahiro MURAGUCHI

A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis

Hideyuki NOSAKA, Yo YAMAGUCHI, Akihiro YAMAGISHI, Masahiro MURAGUCHI

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We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.2 pp.304-312

Publication Date: 2003/02/01

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Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)

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Hideyuki NOSAKA, Yo YAMAGUCHI, Akihiro YAMAGISHI, Masahiro MURAGUCHI, "A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis" in IEICE TRANSACTIONS on Fundamentals, vol. E86-A, no. 2, pp. 304-312, February 2003, doi: .
Abstract: We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e86-a_2_304/_p

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@ARTICLE{e86-a_2_304,
author={Hideyuki NOSAKA, Yo YAMAGUCHI, Akihiro YAMAGISHI, Masahiro MURAGUCHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis},
year={2003},
volume={E86-A},
number={2},
pages={304-312},
abstract={We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.},
keywords={},
doi={},
ISSN={},
month={February},}

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TY - JOUR
TI - A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 304
EP - 312
AU - Hideyuki NOSAKA
AU - Yo YAMAGUCHI
AU - Akihiro YAMAGISHI
AU - Masahiro MURAGUCHI
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2003
AB - We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.
ER -