The hybrid electrical/optical multi-chip integration technique for optical modules for optical network system has been developed. Employing the technique, a 44 broadcast-and-select type optical matrix switch module has been realized. The module consists of four sets of silica waveguide 1 : 4 splitters/4 : 1 combiners, four 4-channel arrays of polarization insensitive semiconductor optical amplifiers with spot-size converters as optical gates, printed wiring chips for electrical wiring and single mode fibers for optical signal interface on planar waveguide platform fabricated by atmospheric pressure chemical vapor deposition. All the gates and the wiring chips were mounted precisely onto the platform at once in flip-chip manner by self-align technique using AuSn solder bumps. Coupling loss between the waveguide and the SOA gate was estimated to be 4.5 dB. Averaged fiber-to-fiber signal gain, on-off ratio and polarization dependent loss for each of the signal paths was 7 dB 2 dB, more than 40 dB and 0.5 dB, respectively. High speed 10 Gb/s photonic cell switching as short as 2 nsec has been successfully achieved.

The hybrid electrical/optical multi-chip integration technique for optical modules for optical network system has been developed. Employing the technique, a 44 broadcast-and-select type optical matrix switch module has been realized. The module consists of four sets of silica waveguide 1 : 4 splitters/4 : 1 combiners, four 4-channel arrays of polarization insensitive semiconductor optical amplifiers with spot-size converters as optical gates, printed wiring chips for electrical wiring and single mode fibers for optical signal interface on planar waveguide platform fabricated by atmospheric pressure chemical vapor deposition. All the gates and the wiring chips were mounted precisely onto the platform at once in flip-chip manner by self-align technique using AuSn solder bumps. Coupling loss between the waveguide and the SOA gate was estimated to be 4.5 dB. Averaged fiber-to-fiber signal gain, on-off ratio and polarization dependent loss for each of the signal paths was 7 dB 2 dB, more than 40 dB and 0.5 dB, respectively. High speed 10 Gb/s photonic cell switching as short as 2 nsec has been successfully achieved.

In this paper, we discuss configurations of photonic ATM (Asynchronous Transfer Mode) switches and their advantages in terms of the number of optical switching devices to be implemented on the system, the number of wavelengths, throughput, broadcast function etc. In particular, we focus on photonic ATM switch architectures which can be built in the near future; that is, with presently available optical and electrical devices. For example, we assume the optical devices such as optical gate switches with 40 dB on/off ratio. In this context, we evaluate 17 types of photonic ATM switches; they are 6 types of input buffer type switches, 6 types of output buffer type switches, 4 types of shared buffer switches, and 1 proposed type. From our evaluation, for cell switching, wavelength division switching technologies are desirable compared with space division switching technologies in the sense that the former enables us to build a photonic ATM switch with the less number of optical gate switches. Furthermore, we propose a switch architecture equipped with optical delay line buffers on outputs and electric buffers on inputs. We show that our switch architecture is superior in the number of required optical gate switch elements under the given conditions.

The modular and growable photonic ATM switch architecture described in this paper uses both time-division and wavelength-division multiplexing technologies, so the switch capacity can be expanded in both the time and frequency domains. It uses a new implementation of output buffering scheme that overcomes the bottleneck in receiving and storing concurrent ultra fast optical cells. The capacity in one stage of a switch with this architecture can be increased from 32 gigabits per second to several terabits per second in a modular fashion. The proposed switch structure with output channel grouping can greatly reduce the amount of hardware and still guarantee the cell sequence.