In this paper, a sepic-type single-stage electronic ballast (STSSEB) is proposed, which is derived from the combination of a sepic converter and a half-bridge inverter. The ballast can not only step down input voltage directly but achieve high power factor, reduce voltage stress, improve efficiency and lower cost. Since component stress is reduced significantly, the presented ballast can be applied to high voltage mains. Derivation of the STSSEB is first presented. Then, analysis, design and practical consideration for the STSSEB are discussed. A 347 Vac 60 W prototype has been simulated and implemented. Simulations and experimental results have verified the feasibility of the proposed STSSEB.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Chih-Lung SHEN, Kuo-Kuang CHEN, "A Sepic-Type Single-Stage Electronic Ballast for High Line Voltage Applications" in IEICE TRANSACTIONS on Communications,
vol. E95-B, no. 2, pp. 365-369, February 2012, doi: 10.1587/transcom.E95.B.365.
Abstract: In this paper, a sepic-type single-stage electronic ballast (STSSEB) is proposed, which is derived from the combination of a sepic converter and a half-bridge inverter. The ballast can not only step down input voltage directly but achieve high power factor, reduce voltage stress, improve efficiency and lower cost. Since component stress is reduced significantly, the presented ballast can be applied to high voltage mains. Derivation of the STSSEB is first presented. Then, analysis, design and practical consideration for the STSSEB are discussed. A 347 Vac 60 W prototype has been simulated and implemented. Simulations and experimental results have verified the feasibility of the proposed STSSEB.
URL: https://globals.ieice.org/en_transactions/communications/10.1587/transcom.E95.B.365/_p
Copy
@ARTICLE{e95-b_2_365,
author={Chih-Lung SHEN, Kuo-Kuang CHEN, },
journal={IEICE TRANSACTIONS on Communications},
title={A Sepic-Type Single-Stage Electronic Ballast for High Line Voltage Applications},
year={2012},
volume={E95-B},
number={2},
pages={365-369},
abstract={In this paper, a sepic-type single-stage electronic ballast (STSSEB) is proposed, which is derived from the combination of a sepic converter and a half-bridge inverter. The ballast can not only step down input voltage directly but achieve high power factor, reduce voltage stress, improve efficiency and lower cost. Since component stress is reduced significantly, the presented ballast can be applied to high voltage mains. Derivation of the STSSEB is first presented. Then, analysis, design and practical consideration for the STSSEB are discussed. A 347 Vac 60 W prototype has been simulated and implemented. Simulations and experimental results have verified the feasibility of the proposed STSSEB.},
keywords={},
doi={10.1587/transcom.E95.B.365},
ISSN={1745-1345},
month={February},}
Copy
TY - JOUR
TI - A Sepic-Type Single-Stage Electronic Ballast for High Line Voltage Applications
T2 - IEICE TRANSACTIONS on Communications
SP - 365
EP - 369
AU - Chih-Lung SHEN
AU - Kuo-Kuang CHEN
PY - 2012
DO - 10.1587/transcom.E95.B.365
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E95-B
IS - 2
JA - IEICE TRANSACTIONS on Communications
Y1 - February 2012
AB - In this paper, a sepic-type single-stage electronic ballast (STSSEB) is proposed, which is derived from the combination of a sepic converter and a half-bridge inverter. The ballast can not only step down input voltage directly but achieve high power factor, reduce voltage stress, improve efficiency and lower cost. Since component stress is reduced significantly, the presented ballast can be applied to high voltage mains. Derivation of the STSSEB is first presented. Then, analysis, design and practical consideration for the STSSEB are discussed. A 347 Vac 60 W prototype has been simulated and implemented. Simulations and experimental results have verified the feasibility of the proposed STSSEB.
ER -