A dual-mode, triple-band RF front-end receiver for GSM900, DCS1800 and WCDMA is presented in this paper. This chip uses low-IF and zero-IF receiver architectures for GSM and WCDMA respectively to fulfill the entirely different system requirements of the two standards. It consists of three parallel LNAs and down-conversion mixers with on-chip LO I/Q generations. The receiver front-end is implemented in a standard 0.25 µm CMOS process and consumes about 30-mA from a 2.7-V power supply for all modes. The measured double-side band noise figure and voltage gain are 3 dB, 36 dB for the GSM900, 5.9 dB, 31 dB for the DCS1800, and 4.3 dB, 29.6 dB for the WCDMA, respectively.
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Chun-Lin KO, Ming-Ching KUO, Chien-Nan KUO, "A CMOS Dual-Mode RF Front-End Receiver for GSM and WCDMA Applications" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 6, pp. 1218-1224, June 2005, doi: 10.1093/ietele/e88-c.6.1218.
Abstract: A dual-mode, triple-band RF front-end receiver for GSM900, DCS1800 and WCDMA is presented in this paper. This chip uses low-IF and zero-IF receiver architectures for GSM and WCDMA respectively to fulfill the entirely different system requirements of the two standards. It consists of three parallel LNAs and down-conversion mixers with on-chip LO I/Q generations. The receiver front-end is implemented in a standard 0.25 µm CMOS process and consumes about 30-mA from a 2.7-V power supply for all modes. The measured double-side band noise figure and voltage gain are 3 dB, 36 dB for the GSM900, 5.9 dB, 31 dB for the DCS1800, and 4.3 dB, 29.6 dB for the WCDMA, respectively.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.6.1218/_p
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@ARTICLE{e88-c_6_1218,
author={Chun-Lin KO, Ming-Ching KUO, Chien-Nan KUO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A CMOS Dual-Mode RF Front-End Receiver for GSM and WCDMA Applications},
year={2005},
volume={E88-C},
number={6},
pages={1218-1224},
abstract={A dual-mode, triple-band RF front-end receiver for GSM900, DCS1800 and WCDMA is presented in this paper. This chip uses low-IF and zero-IF receiver architectures for GSM and WCDMA respectively to fulfill the entirely different system requirements of the two standards. It consists of three parallel LNAs and down-conversion mixers with on-chip LO I/Q generations. The receiver front-end is implemented in a standard 0.25 µm CMOS process and consumes about 30-mA from a 2.7-V power supply for all modes. The measured double-side band noise figure and voltage gain are 3 dB, 36 dB for the GSM900, 5.9 dB, 31 dB for the DCS1800, and 4.3 dB, 29.6 dB for the WCDMA, respectively.},
keywords={},
doi={10.1093/ietele/e88-c.6.1218},
ISSN={},
month={June},}
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TY - JOUR
TI - A CMOS Dual-Mode RF Front-End Receiver for GSM and WCDMA Applications
T2 - IEICE TRANSACTIONS on Electronics
SP - 1218
EP - 1224
AU - Chun-Lin KO
AU - Ming-Ching KUO
AU - Chien-Nan KUO
PY - 2005
DO - 10.1093/ietele/e88-c.6.1218
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2005
AB - A dual-mode, triple-band RF front-end receiver for GSM900, DCS1800 and WCDMA is presented in this paper. This chip uses low-IF and zero-IF receiver architectures for GSM and WCDMA respectively to fulfill the entirely different system requirements of the two standards. It consists of three parallel LNAs and down-conversion mixers with on-chip LO I/Q generations. The receiver front-end is implemented in a standard 0.25 µm CMOS process and consumes about 30-mA from a 2.7-V power supply for all modes. The measured double-side band noise figure and voltage gain are 3 dB, 36 dB for the GSM900, 5.9 dB, 31 dB for the DCS1800, and 4.3 dB, 29.6 dB for the WCDMA, respectively.
ER -