CMOS Front-End Circuits of Dual-Band GPS Receiver

Yoshihiro UTSUROGI; Masaki HARUOKA; Toshimasa MATSUOKA; Kenji TANIGUCHI

doi:10.1093/ietele/e88-c.6.1275

CMOS Front-End Circuits of Dual-Band GPS Receiver

Yoshihiro UTSUROGI, Masaki HARUOKA, Toshimasa MATSUOKA, Kenji TANIGUCHI

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A RF front-end chip for a dual-band Global Positioning System (GPS) receiver for L1 and L2 bands is designed using 0.25 µm CMOS technology. All function blocks of the GPS front-end are integrated onto one chip. The low noise amplifier has input matching over a wide frequency range to handle the L1 and L2 bands. This receiver uses a dual-band image-reject mixer with the quadrature mixer sharing a transconductor stage. This configuration enables the RF blocks to be shared with the L1 and L2 bands. The receiver has a chip area of 3.16 mm3.16 mm, and consumes 35 mA at 2.5 V.

Publication: IEICE TRANSACTIONS on Electronics Vol.E88-C No.6 pp.1275-1279

Publication Date: 2005/06/01

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DOI: 10.1093/ietele/e88-c.6.1275

Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies)

Category: RF

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Yoshihiro UTSUROGI, Masaki HARUOKA, Toshimasa MATSUOKA, Kenji TANIGUCHI, "CMOS Front-End Circuits of Dual-Band GPS Receiver" in IEICE TRANSACTIONS on Electronics, vol. E88-C, no. 6, pp. 1275-1279, June 2005, doi: 10.1093/ietele/e88-c.6.1275.
Abstract: A RF front-end chip for a dual-band Global Positioning System (GPS) receiver for L1 and L2 bands is designed using 0.25 µm CMOS technology. All function blocks of the GPS front-end are integrated onto one chip. The low noise amplifier has input matching over a wide frequency range to handle the L1 and L2 bands. This receiver uses a dual-band image-reject mixer with the quadrature mixer sharing a transconductor stage. This configuration enables the RF blocks to be shared with the L1 and L2 bands. The receiver has a chip area of 3.16 mm3.16 mm, and consumes 35 mA at 2.5 V.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.6.1275/_p

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@ARTICLE{e88-c_6_1275,
author={Yoshihiro UTSUROGI, Masaki HARUOKA, Toshimasa MATSUOKA, Kenji TANIGUCHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={CMOS Front-End Circuits of Dual-Band GPS Receiver},
year={2005},
volume={E88-C},
number={6},
pages={1275-1279},
abstract={A RF front-end chip for a dual-band Global Positioning System (GPS) receiver for L1 and L2 bands is designed using 0.25 µm CMOS technology. All function blocks of the GPS front-end are integrated onto one chip. The low noise amplifier has input matching over a wide frequency range to handle the L1 and L2 bands. This receiver uses a dual-band image-reject mixer with the quadrature mixer sharing a transconductor stage. This configuration enables the RF blocks to be shared with the L1 and L2 bands. The receiver has a chip area of 3.16 mm3.16 mm, and consumes 35 mA at 2.5 V.},
keywords={},
doi={10.1093/ietele/e88-c.6.1275},
ISSN={},
month={June},}

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TY - JOUR
TI - CMOS Front-End Circuits of Dual-Band GPS Receiver
T2 - IEICE TRANSACTIONS on Electronics
SP - 1275
EP - 1279
AU - Yoshihiro UTSUROGI
AU - Masaki HARUOKA
AU - Toshimasa MATSUOKA
AU - Kenji TANIGUCHI
PY - 2005
DO - 10.1093/ietele/e88-c.6.1275
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2005
AB - A RF front-end chip for a dual-band Global Positioning System (GPS) receiver for L1 and L2 bands is designed using 0.25 µm CMOS technology. All function blocks of the GPS front-end are integrated onto one chip. The low noise amplifier has input matching over a wide frequency range to handle the L1 and L2 bands. This receiver uses a dual-band image-reject mixer with the quadrature mixer sharing a transconductor stage. This configuration enables the RF blocks to be shared with the L1 and L2 bands. The receiver has a chip area of 3.16 mm3.16 mm, and consumes 35 mA at 2.5 V.
ER -