Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI

Yukihito OOWAKI; Shinichiro SHIRATAKE; Toshihide FUJIYOSHI; Mototsugu HAMADA; Fumitoshi HATORI; Masami MURAKATA; Masafumi TAKAHASHI

doi:10.1093/ietele/e89-c.3.263

Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI

Yukihito OOWAKI, Shinichiro SHIRATAKE, Toshihide FUJIYOSHI, Mototsugu HAMADA, Fumitoshi HATORI, Masami MURAKATA, Masafumi TAKAHASHI

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The module-wise dynamic voltage and frequency scaling (MDVFS) scheme is applied to a single-chip H.264/MPEG-4 audio/visual codec LSI. The power consumption of the target module with controlled supply voltage and frequency is reduced by 40% in comparison with the operation without voltage or frequency scaling. The consumed power of the chip is 63 mW in decoding QVGA H.264 video at 15 fps and MPEG-4 AAC LC audio simultaneously. This LSI keep operating continuously even during the voltage transition of the target module by introducing the newly developed dynamic de-skewing system (DDS) which watches and control the clock edge of the target module.

Publication: IEICE TRANSACTIONS on Electronics Vol.E89-C No.3 pp.263-270

Publication Date: 2006/03/01

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Online ISSN: 1745-1353

DOI: 10.1093/ietele/e89-c.3.263

Type of Manuscript: Special Section INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)

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Yukihito OOWAKI, Shinichiro SHIRATAKE, Toshihide FUJIYOSHI, Mototsugu HAMADA, Fumitoshi HATORI, Masami MURAKATA, Masafumi TAKAHASHI, "Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI" in IEICE TRANSACTIONS on Electronics, vol. E89-C, no. 3, pp. 263-270, March 2006, doi: 10.1093/ietele/e89-c.3.263.
Abstract: The module-wise dynamic voltage and frequency scaling (MDVFS) scheme is applied to a single-chip H.264/MPEG-4 audio/visual codec LSI. The power consumption of the target module with controlled supply voltage and frequency is reduced by 40% in comparison with the operation without voltage or frequency scaling. The consumed power of the chip is 63 mW in decoding QVGA H.264 video at 15 fps and MPEG-4 AAC LC audio simultaneously. This LSI keep operating continuously even during the voltage transition of the target module by introducing the newly developed dynamic de-skewing system (DDS) which watches and control the clock edge of the target module.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.3.263/_p

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@ARTICLE{e89-c_3_263,
author={Yukihito OOWAKI, Shinichiro SHIRATAKE, Toshihide FUJIYOSHI, Mototsugu HAMADA, Fumitoshi HATORI, Masami MURAKATA, Masafumi TAKAHASHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI},
year={2006},
volume={E89-C},
number={3},
pages={263-270},
abstract={The module-wise dynamic voltage and frequency scaling (MDVFS) scheme is applied to a single-chip H.264/MPEG-4 audio/visual codec LSI. The power consumption of the target module with controlled supply voltage and frequency is reduced by 40% in comparison with the operation without voltage or frequency scaling. The consumed power of the chip is 63 mW in decoding QVGA H.264 video at 15 fps and MPEG-4 AAC LC audio simultaneously. This LSI keep operating continuously even during the voltage transition of the target module by introducing the newly developed dynamic de-skewing system (DDS) which watches and control the clock edge of the target module.},
keywords={},
doi={10.1093/ietele/e89-c.3.263},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI
T2 - IEICE TRANSACTIONS on Electronics
SP - 263
EP - 270
AU - Yukihito OOWAKI
AU - Shinichiro SHIRATAKE
AU - Toshihide FUJIYOSHI
AU - Mototsugu HAMADA
AU - Fumitoshi HATORI
AU - Masami MURAKATA
AU - Masafumi TAKAHASHI
PY - 2006
DO - 10.1093/ietele/e89-c.3.263
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2006
AB - The module-wise dynamic voltage and frequency scaling (MDVFS) scheme is applied to a single-chip H.264/MPEG-4 audio/visual codec LSI. The power consumption of the target module with controlled supply voltage and frequency is reduced by 40% in comparison with the operation without voltage or frequency scaling. The consumed power of the chip is 63 mW in decoding QVGA H.264 video at 15 fps and MPEG-4 AAC LC audio simultaneously. This LSI keep operating continuously even during the voltage transition of the target module by introducing the newly developed dynamic de-skewing system (DDS) which watches and control the clock edge of the target module.
ER -