Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout

Keiichiro KAGAWA; Makoto SHOUHO; Kazuo HASHIGUCHI; Masahiro NUNOSHITA; Jun OHTA

doi:10.1093/ietele/e90-c.10.2007

Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout

Keiichiro KAGAWA, Makoto SHOUHO, Kazuo HASHIGUCHI, Masahiro NUNOSHITA, Jun OHTA

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We demonstrate low-voltage operation of a CMOS imager with an in-pixel large-gain comparator without degradation of the dynamic range by using a pulse-width-modulation scheme in pixel readout. Experimental results showed a dynamic range of 57 dB with a 1.0 V power supply voltage at the pixel array block, which demonstrates the possibility of low-voltage, single-power-supply operation of imagers fabricated with deep-submicron CMOS technologies.

Publication: IEICE TRANSACTIONS on Electronics Vol.E90-C No.10 pp.2007-2011

Publication Date: 2007/10/01

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Online ISSN: 1745-1353

DOI: 10.1093/ietele/e90-c.10.2007

Type of Manuscript: Special Section LETTER (Special Section on VLSI Technology toward Frontiers of New Market)

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Keiichiro KAGAWA, Makoto SHOUHO, Kazuo HASHIGUCHI, Masahiro NUNOSHITA, Jun OHTA, "Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout" in IEICE TRANSACTIONS on Electronics, vol. E90-C, no. 10, pp. 2007-2011, October 2007, doi: 10.1093/ietele/e90-c.10.2007.
Abstract: We demonstrate low-voltage operation of a CMOS imager with an in-pixel large-gain comparator without degradation of the dynamic range by using a pulse-width-modulation scheme in pixel readout. Experimental results showed a dynamic range of 57 dB with a 1.0 V power supply voltage at the pixel array block, which demonstrates the possibility of low-voltage, single-power-supply operation of imagers fabricated with deep-submicron CMOS technologies.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.10.2007/_p

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@ARTICLE{e90-c_10_2007,
author={Keiichiro KAGAWA, Makoto SHOUHO, Kazuo HASHIGUCHI, Masahiro NUNOSHITA, Jun OHTA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout},
year={2007},
volume={E90-C},
number={10},
pages={2007-2011},
abstract={We demonstrate low-voltage operation of a CMOS imager with an in-pixel large-gain comparator without degradation of the dynamic range by using a pulse-width-modulation scheme in pixel readout. Experimental results showed a dynamic range of 57 dB with a 1.0 V power supply voltage at the pixel array block, which demonstrates the possibility of low-voltage, single-power-supply operation of imagers fabricated with deep-submicron CMOS technologies.},
keywords={},
doi={10.1093/ietele/e90-c.10.2007},
ISSN={1745-1353},
month={October},}

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TY - JOUR
TI - Preliminary Demonstration of 1.0 V CMOS Imager with Semi-Pixel-Level ADC Based on Pulse-Width-Modulation Pixel Readout
T2 - IEICE TRANSACTIONS on Electronics
SP - 2007
EP - 2011
AU - Keiichiro KAGAWA
AU - Makoto SHOUHO
AU - Kazuo HASHIGUCHI
AU - Masahiro NUNOSHITA
AU - Jun OHTA
PY - 2007
DO - 10.1093/ietele/e90-c.10.2007
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2007
AB - We demonstrate low-voltage operation of a CMOS imager with an in-pixel large-gain comparator without degradation of the dynamic range by using a pulse-width-modulation scheme in pixel readout. Experimental results showed a dynamic range of 57 dB with a 1.0 V power supply voltage at the pixel array block, which demonstrates the possibility of low-voltage, single-power-supply operation of imagers fabricated with deep-submicron CMOS technologies.
ER -