Design and Operation of HTS SFQ Circuit Elements

Koji TSUBONE; Hironori WAKANA; Yoshinobu TARUTANI; Seiji ADACHI; Yoshihiro ISHIMARU; Keiichi TANABE

doi:10.1093/ietele/e90-c.3.570

Design and Operation of HTS SFQ Circuit Elements

Koji TSUBONE, Hironori WAKANA, Yoshinobu TARUTANI, Seiji ADACHI, Yoshihiro ISHIMARU, Keiichi TANABE

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Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa₂Cu₃O_7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I_c) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than 7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360 GHz at 4.2 K and 210 GHz at 41 K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10^-6.

Publication: IEICE TRANSACTIONS on Electronics Vol.E90-C No.3 pp.570-578

Publication Date: 2007/03/01

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Online ISSN: 1745-1353

DOI: 10.1093/ietele/e90-c.3.570

Type of Manuscript: Special Section INVITED PAPER (Special Section on Innovative Superconducting Devices and Their Applications)

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Koji TSUBONE, Hironori WAKANA, Yoshinobu TARUTANI, Seiji ADACHI, Yoshihiro ISHIMARU, Keiichi TANABE, "Design and Operation of HTS SFQ Circuit Elements" in IEICE TRANSACTIONS on Electronics, vol. E90-C, no. 3, pp. 570-578, March 2007, doi: 10.1093/ietele/e90-c.3.570.
Abstract: Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa₂Cu₃O_7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I_c) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than 7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360 GHz at 4.2 K and 210 GHz at 41 K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10^-6.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.3.570/_p

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@ARTICLE{e90-c_3_570,
author={Koji TSUBONE, Hironori WAKANA, Yoshinobu TARUTANI, Seiji ADACHI, Yoshihiro ISHIMARU, Keiichi TANABE, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design and Operation of HTS SFQ Circuit Elements},
year={2007},
volume={E90-C},
number={3},
pages={570-578},
abstract={Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa₂Cu₃O_7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I_c) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than 7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360 GHz at 4.2 K and 210 GHz at 41 K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10^-6.},
keywords={},
doi={10.1093/ietele/e90-c.3.570},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - Design and Operation of HTS SFQ Circuit Elements
T2 - IEICE TRANSACTIONS on Electronics
SP - 570
EP - 578
AU - Koji TSUBONE
AU - Hironori WAKANA
AU - Yoshinobu TARUTANI
AU - Seiji ADACHI
AU - Yoshihiro ISHIMARU
AU - Keiichi TANABE
PY - 2007
DO - 10.1093/ietele/e90-c.3.570
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2007
AB - Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa₂Cu₃O_7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I_c) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than 7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360 GHz at 4.2 K and 210 GHz at 41 K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10^-6.
ER -