This paper presents a response time acceleration technique in a high-gain capacitive-feedback frontend amplifier (FA) for high output impedance sensors. Using an auxiliary amplifier as a unity-gain buffer, a sample-and-hold capacitor which is used for band-limiting and sampling the FA output is driven at the beginning of the transient response to make the response faster and then it is re-charged directly by the FA output. A condition and parameters for the response time acceleration using this technique while maintaining the noise level unaffected are discussed. Theoretical analysis and simulation results show that the response time can be less than half of the case without the acceleration technique for the specified settling error of less than 0.5%.

We proposed a novel representation of the thermal noise for scaled MOSFETs by applying an extended van der Ziel's model. A comparison between the proposed representation and Pospieszalski's model is also performed. We confirmed that the representation of drain noise temperature, Td corresponds to the electron temperature in a gradual channel region.

The downscaling of CMOS technology has resulted in strong improvement in RF performance of bulk and SOI MOSFETs. In order to realize a low-noise RF circuit, a deeper understanding of the noise performance for MOSFETs is required. Thermal noise is the main noise source of the CMOS device for high frequency performance, and is dominated by the drain channel noise, induced gate noise, and their correlation noise. In this work, we measured the RF noise parameter (Fmin, Rn, Γ opt) of 45 nm node MOSFETs from 5 to 15 GHz and extracted noise sources and noise coefficients P, R, and C by using an extended van der Ziel's model. We found, for the first time, that correlation coefficient C decreases from positive to negative values when the gate length is reduced continuously with the gate length of sub-100 nm. We confirmed that Pucel's noise figure model, using noise coefficients P, R, and C, can be considered a good approximation even for sub-50 nm MOSFETs. We also discussed a scaling effect of the noise coefficients, especially the correlation noise coefficient C on the minimum noise figure.

In this paper, a compact channel thermal noise model for short-channel MOSFETs is presented and applied to the radio frequency integrated circuit (RFIC) design. Based on the analysis of the relationship among different short-channel effects such as velocity saturation effect (VSE), channel-length modulation (CLM), and carrier heating effect (CHE), the compact model for the channel thermal noise was analytically derived as a simple form. In order to simulate MOSFET's noise characteristics in circuit simulators, an appropriate methodology is proposed. The used compact noise model is verified by comparing simulated results to the measured data at device and circuit level by using 65 nm and 130 nm CMOS technologies, respectively.

Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa2Cu3O7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (Ic) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than 7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360 GHz at 4.2 K and 210 GHz at 41 K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10-6.

The radio-frequency thermal noise in fully-depleted (FD) silicon-on-insulator (SOI) MOSFETs and bulk MOSFETs is theoretically examined using a distributed-transmission-line model. It is shown that the thermal noise in a scaled-down SOI MOSFET is basically smaller than that in a scaled-down bulk MOSFET in a wide frequency range. In the radio-frequency range, parasitic resistances in source and drain don't yield a remarkable contribution to the difference in output thermal noise power between scaled-down bulk MOSFETs and scaled-down SOI MOSFETs. However, the output thermal noise of scaled-down SOI MOSFETs with a finite parasitic resistance is smaller than that of scaled-down bulk MOSFETs because of smaller channel capacitance.

We investigate the intrinsic current fluctuations in small Si-MOSFETs via the Monte Carlo device simulation. It is demonstrated that the temporal fluctuation of the drain current in Si-MOSFETs attains a significant fraction of the averaged drain current when the device width is scaled down to the deep sub-µm regime. This is caused by the drastic decrease in the number of channel electrons. This finding holds true whenever the device width is reduced to deep sub-µm, regardless of the channel length. Most importantly, current fluctuation is associated with the quasi-equilibrium thermal noise in the heavily-doped source and drain regions, whereas its magnitude with respect to the averaged drain current is directly related to the number of channel electrons underneath the gate.

Performance of optical asynchronous code-division multiple-access (CDMA) systems with double optical hard-limiters is analyzed in the presence of avalanche photodiode (APD) noise and thermal noise. Optical orthogonal codes (OOC's) are employed as signature sequence codes. In the analysis, chips are assumed to be synchronous among users: the chip synchronous case. Thus, the performance results in the upper bound on the performance of the asynchronous system. The results show that the optical asynchronous CDMA systems with double optical hard-limiters have good performance in the presence of the APD noise and the thermal noise even when the number of simultaneous users is large.

This paper proposes an architecture for circuit construction for developing single-electron integrated circuits based on majority logic. The majority logic gate circuit proposed consists of a capacitor array for input summation and a single-electron inverter for threshold operation. It accepts an odd number of inputs and produces the corresponding output on the basis of the principle of majority decision; it produces an output of logic "1" if the majority of the inputs is 1, and an output of "0" if the majority is 0. By combining the proposed majority gate circuits, various subsystems can be constructed with a smaller number of devices than that of Boolean-based construction. An adder and a parity generator are designed as examples. It is shown by computer simulation that the designed subsystems produce the correct logic operations. The operation error induced by thermal agitation is also estimated.

This work deals with thermal-noise modeling for silicon vertical bipolar junction transistors (BJTs) and relevant integrated circuits (ICs) operating at low currents. The two-junction BJT compact model is consistently derived from the thermal-noise generalization of the Shockley semiconductor equations developed in work which treats thermal noise as the noise associated with carrier velocity fluctuations. This model describes BJT with the Itô non-linear stochastic-differential-equation (SDE) system and is suitable for large-signal large-fluctuation analysis. It is shown that thermal noise in silicon p-n-junction diode contributes to "microplasma" noise. The above model opens way for a consistent-modeling-based design/optimization of bipolar device noise performance with the help of theory of Itô's SDEs.

An active feedback resonator (AFR) is a kind of circuit which functions as a high unloaded Q resonator. The AFR employs an active feedback loop which compensates for the energy loss of a conventional microwave resonator. Owing to an active element in the AFR, thermal noise should be taken into account when designing the AFR. In order to simplify a circuit design using the AFR we introduced noise temperature (Tn) for the AFR. In addition, we describe the AFR design which gives minimum noise temperature. Finally, the noise temperature, measured in an AFR as a band elimination filter, is compared with the theoretical value to evaluate the AFR.

This paper analyzes the performance of the capacity controlled digital radio system, which controls the number of modulation levels according to the amount of traffic. These analyses are performed under thermal noise and co-channel interference. As a result, the throughput improvement is approximately 16 times comparing with the fixed capacity system which has the designed outage probability of 0.1%. Theoretical results are applied to the future mobile communication system which utilizes TDMA access method or burst co-dec, and it is found that the reuse distance can be improved to 1/5 times when the designed outage probability is 0.1%.