Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link

Kiichi NIITSU; Noriyuki MIURA; Mari INOUE; Yoshihiro NAKAGAWA; Masamoto TAGO; Masayuki MIZUNO; Takayasu SAKURAI; Tadahiro KURODA

doi:10.1093/ietele/e90-c.4.829

Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link

Kiichi NIITSU, Noriyuki MIURA, Mari INOUE, Yoshihiro NAKAGAWA, Masamoto TAGO, Masayuki MIZUNO, Takayasu SAKURAI, Tadahiro KURODA

Full Text Views

0

Share
Cite this

Summary :

A daisy chain of current-driven transmitters in inductive-coupling complementary metal oxide semiconductor (CMOS) links is presented. Transmitter power can be reduced since current is reused by multiple transmitters. Eight transceivers are arranged with a pitch of 20 µm in 0.18 µm CMOS. Transmitter power is reduced by 35% without sacrificing either the data rate (1 Gb/s/ch) or BER (<10^-12) by using a 4-transmitter daisy chain. A coding technique for efficient use of daisy chain transmitters is also proposed. With the proposed coding technique, additional power reduction can be achieved.

Publication: IEICE TRANSACTIONS on Electronics Vol.E90-C No.4 pp.829-835

Publication Date: 2007/04/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1093/ietele/e90-c.4.829

Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)

Category: Analog and Communications

Cite this

Copy

Kiichi NIITSU, Noriyuki MIURA, Mari INOUE, Yoshihiro NAKAGAWA, Masamoto TAGO, Masayuki MIZUNO, Takayasu SAKURAI, Tadahiro KURODA, "Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link" in IEICE TRANSACTIONS on Electronics, vol. E90-C, no. 4, pp. 829-835, April 2007, doi: 10.1093/ietele/e90-c.4.829.
Abstract: A daisy chain of current-driven transmitters in inductive-coupling complementary metal oxide semiconductor (CMOS) links is presented. Transmitter power can be reduced since current is reused by multiple transmitters. Eight transceivers are arranged with a pitch of 20 µm in 0.18 µm CMOS. Transmitter power is reduced by 35% without sacrificing either the data rate (1 Gb/s/ch) or BER (<10^-12) by using a 4-transmitter daisy chain. A coding technique for efficient use of daisy chain transmitters is also proposed. With the proposed coding technique, additional power reduction can be achieved.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.4.829/_p

Copy

@ARTICLE{e90-c_4_829,
author={Kiichi NIITSU, Noriyuki MIURA, Mari INOUE, Yoshihiro NAKAGAWA, Masamoto TAGO, Masayuki MIZUNO, Takayasu SAKURAI, Tadahiro KURODA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link},
year={2007},
volume={E90-C},
number={4},
pages={829-835},
abstract={A daisy chain of current-driven transmitters in inductive-coupling complementary metal oxide semiconductor (CMOS) links is presented. Transmitter power can be reduced since current is reused by multiple transmitters. Eight transceivers are arranged with a pitch of 20 µm in 0.18 µm CMOS. Transmitter power is reduced by 35% without sacrificing either the data rate (1 Gb/s/ch) or BER (<10^-12) by using a 4-transmitter daisy chain. A coding technique for efficient use of daisy chain transmitters is also proposed. With the proposed coding technique, additional power reduction can be achieved.},
keywords={},
doi={10.1093/ietele/e90-c.4.829},
ISSN={1745-1353},
month={April},}

Copy

TY - JOUR
TI - Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link
T2 - IEICE TRANSACTIONS on Electronics
SP - 829
EP - 835
AU - Kiichi NIITSU
AU - Noriyuki MIURA
AU - Mari INOUE
AU - Yoshihiro NAKAGAWA
AU - Masamoto TAGO
AU - Masayuki MIZUNO
AU - Takayasu SAKURAI
AU - Tadahiro KURODA
PY - 2007
DO - 10.1093/ietele/e90-c.4.829
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2007
AB - A daisy chain of current-driven transmitters in inductive-coupling complementary metal oxide semiconductor (CMOS) links is presented. Transmitter power can be reduced since current is reused by multiple transmitters. Eight transceivers are arranged with a pitch of 20 µm in 0.18 µm CMOS. Transmitter power is reduced by 35% without sacrificing either the data rate (1 Gb/s/ch) or BER (<10^-12) by using a 4-transmitter daisy chain. A coding technique for efficient use of daisy chain transmitters is also proposed. With the proposed coding technique, additional power reduction can be achieved.
ER -