A wireless transceiver utilizing inductive coupling has been proposed for communication between chips in system in a package. This transceiver can achieve high-speed communication by using two-dimensional channel arrays. To increase the total bandwidth in the channel arrays, the density of the transceiver should be improved, which means that the inductor size should be scaled down. This paper discusses the scaling theory based on a constant magnetic field rule. By decreasing the chip thickness with the process scaling of 1/α, the inductor size can be scaled to 1/α and the data rate can be increased by α. As a result, the number of aggregated channels can be increased by α2 and the aggregated data bandwidth can be increased by α3. The scaling theory is verified by simulations and experiments in 350, 250, 180, and 90 nm CMOS.
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Daisuke MIZOGUCHI, Noriyuki MIURA, Hiroki ISHIKURO, Tadahiro KURODA, "Constant Magnetic Field Scaling in Inductive-Coupling Data Link" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 2, pp. 200-205, February 2008, doi: 10.1093/ietele/e91-c.2.200.
Abstract: A wireless transceiver utilizing inductive coupling has been proposed for communication between chips in system in a package. This transceiver can achieve high-speed communication by using two-dimensional channel arrays. To increase the total bandwidth in the channel arrays, the density of the transceiver should be improved, which means that the inductor size should be scaled down. This paper discusses the scaling theory based on a constant magnetic field rule. By decreasing the chip thickness with the process scaling of 1/α, the inductor size can be scaled to 1/α and the data rate can be increased by α. As a result, the number of aggregated channels can be increased by α2 and the aggregated data bandwidth can be increased by α3. The scaling theory is verified by simulations and experiments in 350, 250, 180, and 90 nm CMOS.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.2.200/_p
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@ARTICLE{e91-c_2_200,
author={Daisuke MIZOGUCHI, Noriyuki MIURA, Hiroki ISHIKURO, Tadahiro KURODA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Constant Magnetic Field Scaling in Inductive-Coupling Data Link},
year={2008},
volume={E91-C},
number={2},
pages={200-205},
abstract={A wireless transceiver utilizing inductive coupling has been proposed for communication between chips in system in a package. This transceiver can achieve high-speed communication by using two-dimensional channel arrays. To increase the total bandwidth in the channel arrays, the density of the transceiver should be improved, which means that the inductor size should be scaled down. This paper discusses the scaling theory based on a constant magnetic field rule. By decreasing the chip thickness with the process scaling of 1/α, the inductor size can be scaled to 1/α and the data rate can be increased by α. As a result, the number of aggregated channels can be increased by α2 and the aggregated data bandwidth can be increased by α3. The scaling theory is verified by simulations and experiments in 350, 250, 180, and 90 nm CMOS.},
keywords={},
doi={10.1093/ietele/e91-c.2.200},
ISSN={1745-1353},
month={February},}
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TY - JOUR
TI - Constant Magnetic Field Scaling in Inductive-Coupling Data Link
T2 - IEICE TRANSACTIONS on Electronics
SP - 200
EP - 205
AU - Daisuke MIZOGUCHI
AU - Noriyuki MIURA
AU - Hiroki ISHIKURO
AU - Tadahiro KURODA
PY - 2008
DO - 10.1093/ietele/e91-c.2.200
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2008
AB - A wireless transceiver utilizing inductive coupling has been proposed for communication between chips in system in a package. This transceiver can achieve high-speed communication by using two-dimensional channel arrays. To increase the total bandwidth in the channel arrays, the density of the transceiver should be improved, which means that the inductor size should be scaled down. This paper discusses the scaling theory based on a constant magnetic field rule. By decreasing the chip thickness with the process scaling of 1/α, the inductor size can be scaled to 1/α and the data rate can be increased by α. As a result, the number of aggregated channels can be increased by α2 and the aggregated data bandwidth can be increased by α3. The scaling theory is verified by simulations and experiments in 350, 250, 180, and 90 nm CMOS.
ER -