A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage

Katsuji KIMURA

A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage

Katsuji KIMURA

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Novel circuit design techniques for bipolar and MOS four-quadrant analog multipliers operable on low supply voltage are described. There are three design techniques for multipliers operable on low supply voltage. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. Bipolar and MOS four-quadrant analog multipliers proposed in this paper consist of transistor-pairs with different transistor sizes (i.e. emitter areas or gate W/L values are different), transistor-pairs with the same bias offset or multitail cells (i.e. quadritail cells and an octotail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to the multipliers when the multiplication method is based on the quarter-square technique. These multipliers all have satisfiable multiplication characteristics with four-quadrant operations in analog signal processing, whether implemented in bipolar technology or implemented in MOS technology.

Publication: IEICE TRANSACTIONS on Electronics Vol.E76-C No.5 pp.714-737

Publication Date: 1993/05/25

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Type of Manuscript: Special Section PAPER (Special Section on Low-Power and Low-Voltage Integrated Circuits)

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Katsuji KIMURA, "A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage" in IEICE TRANSACTIONS on Electronics, vol. E76-C, no. 5, pp. 714-737, May 1993, doi: .
Abstract: Novel circuit design techniques for bipolar and MOS four-quadrant analog multipliers operable on low supply voltage are described. There are three design techniques for multipliers operable on low supply voltage. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. Bipolar and MOS four-quadrant analog multipliers proposed in this paper consist of transistor-pairs with different transistor sizes (i.e. emitter areas or gate W/L values are different), transistor-pairs with the same bias offset or multitail cells (i.e. quadritail cells and an octotail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to the multipliers when the multiplication method is based on the quarter-square technique. These multipliers all have satisfiable multiplication characteristics with four-quadrant operations in analog signal processing, whether implemented in bipolar technology or implemented in MOS technology.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e76-c_5_714/_p

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@ARTICLE{e76-c_5_714,
author={Katsuji KIMURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage},
year={1993},
volume={E76-C},
number={5},
pages={714-737},
abstract={Novel circuit design techniques for bipolar and MOS four-quadrant analog multipliers operable on low supply voltage are described. There are three design techniques for multipliers operable on low supply voltage. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. Bipolar and MOS four-quadrant analog multipliers proposed in this paper consist of transistor-pairs with different transistor sizes (i.e. emitter areas or gate W/L values are different), transistor-pairs with the same bias offset or multitail cells (i.e. quadritail cells and an octotail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to the multipliers when the multiplication method is based on the quarter-square technique. These multipliers all have satisfiable multiplication characteristics with four-quadrant operations in analog signal processing, whether implemented in bipolar technology or implemented in MOS technology.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage
T2 - IEICE TRANSACTIONS on Electronics
SP - 714
EP - 737
AU - Katsuji KIMURA
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E76-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 1993
AB - Novel circuit design techniques for bipolar and MOS four-quadrant analog multipliers operable on low supply voltage are described. There are three design techniques for multipliers operable on low supply voltage. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. Bipolar and MOS four-quadrant analog multipliers proposed in this paper consist of transistor-pairs with different transistor sizes (i.e. emitter areas or gate W/L values are different), transistor-pairs with the same bias offset or multitail cells (i.e. quadritail cells and an octotail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to the multipliers when the multiplication method is based on the quarter-square technique. These multipliers all have satisfiable multiplication characteristics with four-quadrant operations in analog signal processing, whether implemented in bipolar technology or implemented in MOS technology.
ER -