VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application

Yoichi MATSUMOTO; Kiyoshi KOBAYASHI; Tetsu SAKATA; Kazuhiko SEKI; Shuji KUBOTA; Shuzo KATO

VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application

Yoichi MATSUMOTO, Kiyoshi KOBAYASHI, Tetsu SAKATA, Kazuhiko SEKI, Shuji KUBOTA, Shuzo KATO

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This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low E_b/N_o environments.

Publication: IEICE TRANSACTIONS on Electronics Vol.E77-C No.12 pp.1873-1880

Publication Date: 1994/12/25

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Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)

Category: Multimedia System LSIs

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Yoichi MATSUMOTO, Kiyoshi KOBAYASHI, Tetsu SAKATA, Kazuhiko SEKI, Shuji KUBOTA, Shuzo KATO, "VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application" in IEICE TRANSACTIONS on Electronics, vol. E77-C, no. 12, pp. 1873-1880, December 1994, doi: .
Abstract: This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low E_b/N_o environments.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e77-c_12_1873/_p

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@ARTICLE{e77-c_12_1873,
author={Yoichi MATSUMOTO, Kiyoshi KOBAYASHI, Tetsu SAKATA, Kazuhiko SEKI, Shuji KUBOTA, Shuzo KATO, },
journal={IEICE TRANSACTIONS on Electronics},
title={VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application},
year={1994},
volume={E77-C},
number={12},
pages={1873-1880},
abstract={This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low E_b/N_o environments.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application
T2 - IEICE TRANSACTIONS on Electronics
SP - 1873
EP - 1880
AU - Yoichi MATSUMOTO
AU - Kiyoshi KOBAYASHI
AU - Tetsu SAKATA
AU - Kazuhiko SEKI
AU - Shuji KUBOTA
AU - Shuzo KATO
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 1994
AB - This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low E_b/N_o environments.
ER -