Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)

Masahiro SHIMIZU; Masahide INUISHI; Katsuhiro TSUKAMOTO; Hideaki ARIMA; Hirokazu MIYOSHI

Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)

Masahiro SHIMIZU, Masahide INUISHI, Katsuhiro TSUKAMOTO, Hideaki ARIMA, Hirokazu MIYOSHI

Full Text Views

0

Share
Cite this

Summary :

A novel isolation structure which has a buried insulator between polysilicon electrodes (BIPS) has been developed. The BIPS isolation employs the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolation. Using BIPS isolation, we can almost suppress the narrow-channel effects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. The use of BIPS isolation technology yields a DRAM cell of small area. The successful fabrication of deep submicron devices with BIPS isolation clearly demonstrates that this technology has superior ability to overcome the LOCOS isolation.

Publication: IEICE TRANSACTIONS on Electronics Vol.E77-C No.8 pp.1369-1376

Publication Date: 1994/08/25

Publicized

Online ISSN

DOI

Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)

Category: General Technology

Cite this

Copy

Masahiro SHIMIZU, Masahide INUISHI, Katsuhiro TSUKAMOTO, Hideaki ARIMA, Hirokazu MIYOSHI, "Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)" in IEICE TRANSACTIONS on Electronics, vol. E77-C, no. 8, pp. 1369-1376, August 1994, doi: .
Abstract: A novel isolation structure which has a buried insulator between polysilicon electrodes (BIPS) has been developed. The BIPS isolation employs the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolation. Using BIPS isolation, we can almost suppress the narrow-channel effects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. The use of BIPS isolation technology yields a DRAM cell of small area. The successful fabrication of deep submicron devices with BIPS isolation clearly demonstrates that this technology has superior ability to overcome the LOCOS isolation.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e77-c_8_1369/_p

Copy

@ARTICLE{e77-c_8_1369,
author={Masahiro SHIMIZU, Masahide INUISHI, Katsuhiro TSUKAMOTO, Hideaki ARIMA, Hirokazu MIYOSHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)},
year={1994},
volume={E77-C},
number={8},
pages={1369-1376},
abstract={A novel isolation structure which has a buried insulator between polysilicon electrodes (BIPS) has been developed. The BIPS isolation employs the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolation. Using BIPS isolation, we can almost suppress the narrow-channel effects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. The use of BIPS isolation technology yields a DRAM cell of small area. The successful fabrication of deep submicron devices with BIPS isolation clearly demonstrates that this technology has superior ability to overcome the LOCOS isolation.},
keywords={},
doi={},
ISSN={},
month={August},}

Copy

TY - JOUR
TI - Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)
T2 - IEICE TRANSACTIONS on Electronics
SP - 1369
EP - 1376
AU - Masahiro SHIMIZU
AU - Masahide INUISHI
AU - Katsuhiro TSUKAMOTO
AU - Hideaki ARIMA
AU - Hirokazu MIYOSHI
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1994
AB - A novel isolation structure which has a buried insulator between polysilicon electrodes (BIPS) has been developed. The BIPS isolation employs the refilling CVD-oxides in openings between polysilicon electrodes by photoresist etchback process. Device characteristics and parasitic effects of BIPS isolation have been compared with that of LOCOS isolation. Using BIPS isolation, we can almost suppress the narrow-channel effects and achieve the deep submicron isolation. No degradation on the subthreshold decay of devices with BIPS isolation can be obtained. The use of BIPS isolation technology yields a DRAM cell of small area. The successful fabrication of deep submicron devices with BIPS isolation clearly demonstrates that this technology has superior ability to overcome the LOCOS isolation.
ER -