A Source Sensing Technique Applied to SRAM Cells

Kevin J. O'CONNOR

A Source Sensing Technique Applied to SRAM Cells

Kevin J. O'CONNOR

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A new CMOS cell design is proposed, analyzed, and implemented in an ASIC macrocell generator to evaluate the performance and reliability of sensing the ground return current produced in the cell during read access. Both single and dual port cell configurations are studied for static noise margin (SNM), writing requirements, and source offset voltage effects. To frame the advantages and differences of the SSS cell, a comparison is made to several conventional SRAM cells. Noise margins are found to be the same or better than conventional cells, and where design allows cell device ratio optimizations, single ended access cells can generate greater SNM than differential cells. The source sensing technique was evaluated by inserting the new cell in a 0.5 µm ASIC memory block and tested on standard ASIC test sets.

Publication: IEICE TRANSACTIONS on Electronics Vol.E78-C No.6 pp.748-759

Publication Date: 1995/06/25

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Type of Manuscript: Special Section PAPER (Special Issue on the 1994 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol. 30, No. 4 April 1995))

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Kevin J. O'CONNOR

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Kevin J. O'CONNOR, "A Source Sensing Technique Applied to SRAM Cells" in IEICE TRANSACTIONS on Electronics, vol. E78-C, no. 6, pp. 748-759, June 1995, doi: .
Abstract: A new CMOS cell design is proposed, analyzed, and implemented in an ASIC macrocell generator to evaluate the performance and reliability of sensing the ground return current produced in the cell during read access. Both single and dual port cell configurations are studied for static noise margin (SNM), writing requirements, and source offset voltage effects. To frame the advantages and differences of the SSS cell, a comparison is made to several conventional SRAM cells. Noise margins are found to be the same or better than conventional cells, and where design allows cell device ratio optimizations, single ended access cells can generate greater SNM than differential cells. The source sensing technique was evaluated by inserting the new cell in a 0.5 µm ASIC memory block and tested on standard ASIC test sets.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e78-c_6_748/_p

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@ARTICLE{e78-c_6_748,
author={Kevin J. O'CONNOR, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Source Sensing Technique Applied to SRAM Cells},
year={1995},
volume={E78-C},
number={6},
pages={748-759},
abstract={A new CMOS cell design is proposed, analyzed, and implemented in an ASIC macrocell generator to evaluate the performance and reliability of sensing the ground return current produced in the cell during read access. Both single and dual port cell configurations are studied for static noise margin (SNM), writing requirements, and source offset voltage effects. To frame the advantages and differences of the SSS cell, a comparison is made to several conventional SRAM cells. Noise margins are found to be the same or better than conventional cells, and where design allows cell device ratio optimizations, single ended access cells can generate greater SNM than differential cells. The source sensing technique was evaluated by inserting the new cell in a 0.5 µm ASIC memory block and tested on standard ASIC test sets.},
keywords={},
doi={},
ISSN={},
month={June},}

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TY - JOUR
TI - A Source Sensing Technique Applied to SRAM Cells
T2 - IEICE TRANSACTIONS on Electronics
SP - 748
EP - 759
AU - Kevin J. O'CONNOR
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E78-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1995
AB - A new CMOS cell design is proposed, analyzed, and implemented in an ASIC macrocell generator to evaluate the performance and reliability of sensing the ground return current produced in the cell during read access. Both single and dual port cell configurations are studied for static noise margin (SNM), writing requirements, and source offset voltage effects. To frame the advantages and differences of the SSS cell, a comparison is made to several conventional SRAM cells. Noise margins are found to be the same or better than conventional cells, and where design allows cell device ratio optimizations, single ended access cells can generate greater SNM than differential cells. The source sensing technique was evaluated by inserting the new cell in a 0.5 µm ASIC memory block and tested on standard ASIC test sets.
ER -