A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display

Ho-Seong KIM; Pil-Ho LEE; Jin-Wook HAN; Seung-Hun SHIN; Seung-Wuk BAEK; Doo-Ill PARK; Yongkyu SEO; Young-Chan JANG

doi:10.1587/transele.E100.C.1035

A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display

Ho-Seong KIM, Pil-Ho LEE, Jin-Wook HAN, Seung-Hun SHIN, Seung-Wuk BAEK, Doo-Ill PARK, Yongkyu SEO, Young-Chan JANG

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Summary :

A 10 Gbps transmitter bridge chip including four data lanes, which increases the bandwidth using an 8-to-1 serialization, is proposed for a field-programmable gate array (FPGA)-based frame generator to support the protocol of the D-PHY version 1.2 for the mobile industry processor interface (MIPI) display serial interface (DSI).

Publication: IEICE TRANSACTIONS on Electronics Vol.E100-C No.11 pp.1035-1038

Publication Date: 2017/11/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E100.C.1035

Type of Manuscript: BRIEF PAPER

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Authors

Ho-Seong KIM
  Kumoth National Instisute of Technology
Pil-Ho LEE
  Kumoth National Instisute of Technology
Jin-Wook HAN
  Kumoth National Instisute of Technology
Seung-Hun SHIN
  Kumoth National Instisute of Technology
Seung-Wuk BAEK
  Kumoth National Instisute of Technology
Doo-Ill PARK
  Top Engineering Co. Ltd.
Yongkyu SEO
  Top Engineering Co. Ltd.
Young-Chan JANG
  Kumoth National Instisute of Technology

Keyword

transmitter bridge chip, MIPI D-PHY, DSI, FPGA-based frame generator, phase-locked loop

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Ho-Seong KIM, Pil-Ho LEE, Jin-Wook HAN, Seung-Hun SHIN, Seung-Wuk BAEK, Doo-Ill PARK, Yongkyu SEO, Young-Chan JANG, "A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display" in IEICE TRANSACTIONS on Electronics, vol. E100-C, no. 11, pp. 1035-1038, November 2017, doi: 10.1587/transele.E100.C.1035.
Abstract: A 10 Gbps transmitter bridge chip including four data lanes, which increases the bandwidth using an 8-to-1 serialization, is proposed for a field-programmable gate array (FPGA)-based frame generator to support the protocol of the D-PHY version 1.2 for the mobile industry processor interface (MIPI) display serial interface (DSI).
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E100.C.1035/_p

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@ARTICLE{e100-c_11_1035,
author={Ho-Seong KIM, Pil-Ho LEE, Jin-Wook HAN, Seung-Hun SHIN, Seung-Wuk BAEK, Doo-Ill PARK, Yongkyu SEO, Young-Chan JANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display},
year={2017},
volume={E100-C},
number={11},
pages={1035-1038},
abstract={A 10 Gbps transmitter bridge chip including four data lanes, which increases the bandwidth using an 8-to-1 serialization, is proposed for a field-programmable gate array (FPGA)-based frame generator to support the protocol of the D-PHY version 1.2 for the mobile industry processor interface (MIPI) display serial interface (DSI).},
keywords={},
doi={10.1587/transele.E100.C.1035},
ISSN={1745-1353},
month={November},}

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TY - JOUR
TI - A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display
T2 - IEICE TRANSACTIONS on Electronics
SP - 1035
EP - 1038
AU - Ho-Seong KIM
AU - Pil-Ho LEE
AU - Jin-Wook HAN
AU - Seung-Hun SHIN
AU - Seung-Wuk BAEK
AU - Doo-Ill PARK
AU - Yongkyu SEO
AU - Young-Chan JANG
PY - 2017
DO - 10.1587/transele.E100.C.1035
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E100-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2017
AB - A 10 Gbps transmitter bridge chip including four data lanes, which increases the bandwidth using an 8-to-1 serialization, is proposed for a field-programmable gate array (FPGA)-based frame generator to support the protocol of the D-PHY version 1.2 for the mobile industry processor interface (MIPI) display serial interface (DSI).
ER -