Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip

Ryo MINAMI; JeeYoung HONG; Kenichi OKADA; Akira MATSUZAWA

doi:10.1587/transele.E94.C.1057

Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip

Ryo MINAMI, JeeYoung HONG, Kenichi OKADA, Akira MATSUZAWA

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This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50 dB with more than 0.4 mm PA-to-LNA distance.

Publication: IEICE TRANSACTIONS on Electronics Vol.E94-C No.6 pp.1057-1060

Publication Date: 2011/06/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E94.C.1057

Type of Manuscript: BRIEF PAPER

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Ryo MINAMI, JeeYoung HONG, Kenichi OKADA, Akira MATSUZAWA, "Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip" in IEICE TRANSACTIONS on Electronics, vol. E94-C, no. 6, pp. 1057-1060, June 2011, doi: 10.1587/transele.E94.C.1057.
Abstract: This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50 dB with more than 0.4 mm PA-to-LNA distance.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1057/_p

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@ARTICLE{e94-c_6_1057,
author={Ryo MINAMI, JeeYoung HONG, Kenichi OKADA, Akira MATSUZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip},
year={2011},
volume={E94-C},
number={6},
pages={1057-1060},
abstract={This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50 dB with more than 0.4 mm PA-to-LNA distance.},
keywords={},
doi={10.1587/transele.E94.C.1057},
ISSN={1745-1353},
month={June},}

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TY - JOUR
TI - Measurement of Integrated PA-to-LNA Isolation on Si CMOS Chip
T2 - IEICE TRANSACTIONS on Electronics
SP - 1057
EP - 1060
AU - Ryo MINAMI
AU - JeeYoung HONG
AU - Kenichi OKADA
AU - Akira MATSUZAWA
PY - 2011
DO - 10.1587/transele.E94.C.1057
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2011
AB - This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50 dB with more than 0.4 mm PA-to-LNA distance.
ER -