This paper presents measurement of on-chip coupling between PA and LNA integrated on Si CMOS substrate, which is caused by substrate coupling, magnetic coupling, power-line coupling, etc. These components are decomposed by measurements using diced chips. The result reveals that the substrate coupling is the most dominant in CMOS chips and the total isolation becomes less than -50 dB with more than 0.4 mm PA-to-LNA distance.

This paper presents three CMOS power amplifiers (PA) which realize wide-tunable output impedance matching. For realization of multi-standard and single-chip transceiver, the prototypes were fabricated by 0.18 µm CMOS process. The proposed PAs can achieve a tunable impedance matching within a wide frequency range by utilizing a resistive feedback and parallel resonator with an inductor and capacitor array. Therefore, the proposed PA has a realization possibility of isolator-less PA which contributes to decrease die area including external component. In other words, the PAs have tunable impedance matching function at their output ends. With a 3.3-V supply, three power amplifiers can cover frequency ranges of 0.9–3.0 GHz, 2.1–5.8 GHz, and 5.7–9.7 GHz, respectively. The PAs realize P1 dB of 21 dBm, Psat of 22 dBm, and PAEpeak of larger than 23%. The proposed PAs present a potential to realize multi-band transceivers without isolators.

This paper presents two CMOS power amplifiers which realize frequency band selection. Each PA consists of two stages and uses a transformer to obtain large output power with high efficiency. Furthermore, the capacitive cross-coupling at the second stage reduces a die area of the bypass capacitance. The proposed PAs are fabricated by a 0.18 µm CMOS process. With a 3.3 V supply, the PAs achieve a output 1-dB compression point of larger than 25 dBm from 2.2 GHz to 5.4 GHz, maximum of peak power added efficiency (PAEpeak) are 30% and 27% for 2-band and 3-band PAs, respectively. The proposed PAs have advantages which are a band-selectable ability within a desired frequency range and a realization of CMOS PA with high power efficiency.