A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback

Hiroshi HATANO

doi:10.1587/transele.E94.C.1131

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Hiroshi HATANO, "A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback" in IEICE TRANSACTIONS on Electronics, vol. E94-C, no. 6, pp. 1131-1134, June 2011, doi: 10.1587/transele.E94.C.1131.
Abstract: Clocked cascade voltage switch logic (C²VSL) circuits with gated feedback were newly designed for synchronous systems. In order to investigate single event transient (SET) effects on the C²VSL circuits, SET effects on C²VSL EX-OR circuits were analyzed using SPICE. Simulation results have indicated that the C²VSL have increased tolerance to SET.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1131/_p

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@ARTICLE{e94-c_6_1131,
author={Hiroshi HATANO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback},
year={2011},
volume={E94-C},
number={6},
pages={1131-1134},
abstract={Clocked cascade voltage switch logic (C²VSL) circuits with gated feedback were newly designed for synchronous systems. In order to investigate single event transient (SET) effects on the C²VSL circuits, SET effects on C²VSL EX-OR circuits were analyzed using SPICE. Simulation results have indicated that the C²VSL have increased tolerance to SET.},
keywords={},
doi={10.1587/transele.E94.C.1131},
ISSN={1745-1353},
month={June},}

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TY - JOUR
TI - A Fundamental Analysis of Single Event Effects on Clocked CVSL Circuits with Gated Feedback
T2 - IEICE TRANSACTIONS on Electronics
SP - 1131
EP - 1134
AU - Hiroshi HATANO
PY - 2011
DO - 10.1587/transele.E94.C.1131
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2011
AB - Clocked cascade voltage switch logic (C²VSL) circuits with gated feedback were newly designed for synchronous systems. In order to investigate single event transient (SET) effects on the C²VSL circuits, SET effects on C²VSL EX-OR circuits were analyzed using SPICE. Simulation results have indicated that the C²VSL have increased tolerance to SET.
ER -