Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation

Yoshitaka HIRAMATSU; Hasitha Muthumala WAIDYASOORIYA; Masanori HARIYAMA; Toru NOJIRI; Kunio UCHIYAMA; Michitaka KAMEYAMA

doi:10.1587/transele.E95.C.1872

Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation

Yoshitaka HIRAMATSU, Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA, Toru NOJIRI, Kunio UCHIYAMA, Michitaka KAMEYAMA

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The large data-transfer time among different cores is a big problem in heterogeneous multi-core processors. This paper presents a method to accelerate the data transfers exploiting data-transfer-units together with complex memory allocation. We used block matching, which is very common in image processing, to evaluate our technique. The proposed method reduces the data-transfer time by more than 42% compared to the earlier works that use CPU-based data transfers. Moreover, the total processing time is only 15 ms for a VGA image with 1616 pixel blocks.

Publication: IEICE TRANSACTIONS on Electronics Vol.E95-C No.12 pp.1872-1882

Publication Date: 2012/12/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E95.C.1872

Type of Manuscript: PAPER

Category: Integrated Electronics

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Yoshitaka HIRAMATSU, Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA, Toru NOJIRI, Kunio UCHIYAMA, Michitaka KAMEYAMA, "Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation" in IEICE TRANSACTIONS on Electronics, vol. E95-C, no. 12, pp. 1872-1882, December 2012, doi: 10.1587/transele.E95.C.1872.
Abstract: The large data-transfer time among different cores is a big problem in heterogeneous multi-core processors. This paper presents a method to accelerate the data transfers exploiting data-transfer-units together with complex memory allocation. We used block matching, which is very common in image processing, to evaluate our technique. The proposed method reduces the data-transfer time by more than 42% compared to the earlier works that use CPU-based data transfers. Moreover, the total processing time is only 15 ms for a VGA image with 1616 pixel blocks.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.1872/_p

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@ARTICLE{e95-c_12_1872,
author={Yoshitaka HIRAMATSU, Hasitha Muthumala WAIDYASOORIYA, Masanori HARIYAMA, Toru NOJIRI, Kunio UCHIYAMA, Michitaka KAMEYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation},
year={2012},
volume={E95-C},
number={12},
pages={1872-1882},
abstract={The large data-transfer time among different cores is a big problem in heterogeneous multi-core processors. This paper presents a method to accelerate the data transfers exploiting data-transfer-units together with complex memory allocation. We used block matching, which is very common in image processing, to evaluate our technique. The proposed method reduces the data-transfer time by more than 42% compared to the earlier works that use CPU-based data transfers. Moreover, the total processing time is only 15 ms for a VGA image with 1616 pixel blocks.},
keywords={},
doi={10.1587/transele.E95.C.1872},
ISSN={1745-1353},
month={December},}

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TY - JOUR
TI - Acceleration of Block Matching on a Low-Power Heterogeneous Multi-Core Processor Based on DTU Data-Transfer with Data Re-Allocation
T2 - IEICE TRANSACTIONS on Electronics
SP - 1872
EP - 1882
AU - Yoshitaka HIRAMATSU
AU - Hasitha Muthumala WAIDYASOORIYA
AU - Masanori HARIYAMA
AU - Toru NOJIRI
AU - Kunio UCHIYAMA
AU - Michitaka KAMEYAMA
PY - 2012
DO - 10.1587/transele.E95.C.1872
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2012
AB - The large data-transfer time among different cores is a big problem in heterogeneous multi-core processors. This paper presents a method to accelerate the data transfers exploiting data-transfer-units together with complex memory allocation. We used block matching, which is very common in image processing, to evaluate our technique. The proposed method reduces the data-transfer time by more than 42% compared to the earlier works that use CPU-based data transfers. Moreover, the total processing time is only 15 ms for a VGA image with 1616 pixel blocks.
ER -