A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections

Rui WU; Wei DENG; Shinji SATO; Takuichi HIRANO; Ning LI; Takeshi INOUE; Hitoshi SAKANE; Kenichi OKADA; Akira MATSUZAWA

doi:10.1587/transele.E98.C.304

A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections

Rui WU, Wei DENG, Shinji SATO, Takuichi HIRANO, Ning LI, Takeshi INOUE, Hitoshi SAKANE, Kenichi OKADA, Akira MATSUZAWA

Full Text Views

0

Share
Cite this

Summary :

A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnections is presented. The radiation gain of the on-chip antenna is doubled using helium-3 ion irradiation technique. The transmitter core is composed of a resistive-feedback RF amplifier, a double-balanced passive mixer, and an injection-locked oscillator. The wideband and power-saving design of the transmitter core guarantees the low-power and high-data-rate characteristic. The transmitter fabricated in a 65-nm CMOS process achieves 5-Gb/s data rate with an EVM performance of -12 dB for BPSK modulation at a distance of 1 mm. The whole transmitter consumes 17 mW from a 1.2-V supply and occupies a core area of 0.64 mm² including the on-chip antenna. The gain-enhanced antenna together with the wideband and power-saving design of the transmitter provides a low-power low-cost full on-chip solution for the short-range high-data-rate wireless communication.

Publication: IEICE TRANSACTIONS on Electronics Vol.E98-C No.4 pp.304-314

Publication Date: 2015/04/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E98.C.304

Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design---Architecture, Circuit, Device and Design Methodology)

Category

Authors

Rui WU
  Tokyo Institute of Technology
Wei DENG
  Tokyo Institute of Technology
Shinji SATO
  Tokyo Institute of Technology
Takuichi HIRANO
  Tokyo Institute of Technology
Ning LI
  Tokyo Institute of Technology
Takeshi INOUE
  S.H.I. Examination & Inspection, Ltd.
Hitoshi SAKANE
  S.H.I. Examination & Inspection, Ltd.
Kenichi OKADA
  Tokyo Institute of Technology
Akira MATSUZAWA
  Tokyo Institute of Technology

Keyword

60-GHz transmitter, CMOS, on-chip antenna, helium-3 ion irradiation, short-range, high-data-rate

Cite this

Copy

Rui WU, Wei DENG, Shinji SATO, Takuichi HIRANO, Ning LI, Takeshi INOUE, Hitoshi SAKANE, Kenichi OKADA, Akira MATSUZAWA, "A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections" in IEICE TRANSACTIONS on Electronics, vol. E98-C, no. 4, pp. 304-314, April 2015, doi: 10.1587/transele.E98.C.304.
Abstract: A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnections is presented. The radiation gain of the on-chip antenna is doubled using helium-3 ion irradiation technique. The transmitter core is composed of a resistive-feedback RF amplifier, a double-balanced passive mixer, and an injection-locked oscillator. The wideband and power-saving design of the transmitter core guarantees the low-power and high-data-rate characteristic. The transmitter fabricated in a 65-nm CMOS process achieves 5-Gb/s data rate with an EVM performance of -12 dB for BPSK modulation at a distance of 1 mm. The whole transmitter consumes 17 mW from a 1.2-V supply and occupies a core area of 0.64 mm² including the on-chip antenna. The gain-enhanced antenna together with the wideband and power-saving design of the transmitter provides a low-power low-cost full on-chip solution for the short-range high-data-rate wireless communication.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.304/_p

Copy

@ARTICLE{e98-c_4_304,
author={Rui WU, Wei DENG, Shinji SATO, Takuichi HIRANO, Ning LI, Takeshi INOUE, Hitoshi SAKANE, Kenichi OKADA, Akira MATSUZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections},
year={2015},
volume={E98-C},
number={4},
pages={304-314},
abstract={A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnections is presented. The radiation gain of the on-chip antenna is doubled using helium-3 ion irradiation technique. The transmitter core is composed of a resistive-feedback RF amplifier, a double-balanced passive mixer, and an injection-locked oscillator. The wideband and power-saving design of the transmitter core guarantees the low-power and high-data-rate characteristic. The transmitter fabricated in a 65-nm CMOS process achieves 5-Gb/s data rate with an EVM performance of -12 dB for BPSK modulation at a distance of 1 mm. The whole transmitter consumes 17 mW from a 1.2-V supply and occupies a core area of 0.64 mm² including the on-chip antenna. The gain-enhanced antenna together with the wideband and power-saving design of the transmitter provides a low-power low-cost full on-chip solution for the short-range high-data-rate wireless communication.},
keywords={},
doi={10.1587/transele.E98.C.304},
ISSN={1745-1353},
month={April},}

Copy

TY - JOUR
TI - A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections
T2 - IEICE TRANSACTIONS on Electronics
SP - 304
EP - 314
AU - Rui WU
AU - Wei DENG
AU - Shinji SATO
AU - Takuichi HIRANO
AU - Ning LI
AU - Takeshi INOUE
AU - Hitoshi SAKANE
AU - Kenichi OKADA
AU - Akira MATSUZAWA
PY - 2015
DO - 10.1587/transele.E98.C.304
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2015
AB - A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnections is presented. The radiation gain of the on-chip antenna is doubled using helium-3 ion irradiation technique. The transmitter core is composed of a resistive-feedback RF amplifier, a double-balanced passive mixer, and an injection-locked oscillator. The wideband and power-saving design of the transmitter core guarantees the low-power and high-data-rate characteristic. The transmitter fabricated in a 65-nm CMOS process achieves 5-Gb/s data rate with an EVM performance of -12 dB for BPSK modulation at a distance of 1 mm. The whole transmitter consumes 17 mW from a 1.2-V supply and occupies a core area of 0.64 mm² including the on-chip antenna. The gain-enhanced antenna together with the wideband and power-saving design of the transmitter provides a low-power low-cost full on-chip solution for the short-range high-data-rate wireless communication.
ER -