Quality and Power Efficient Architecture for the Discrete Cosine Transform

Chi-Chia SUNG; Shanq-Jang RUAN; Bo-Yao LIN; Mon-Chau SHIE

doi:10.1093/ietfec/e88-a.12.3500

Quality and Power Efficient Architecture for the Discrete Cosine Transform

Chi-Chia SUNG, Shanq-Jang RUAN, Bo-Yao LIN, Mon-Chau SHIE

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In recent years, the demand for multimedia mobile battery-operated devices has created a need for low power implementation of video compression. Many compression standards require the discrete cosine transform (DCT) function to perform image/video compression. For this reason, low power DCT design has become more and more important in today's image/video processing. This paper presents a new power-efficient Hybrid DCT architecture which combines Loeffler DCT and binDCT in terms of special property on luminance and chrominance difference. We use Synopsys PrimePower to estimate the power consumption in a TSMC 0.25-µm technology. Besides, we also adopt a novel quality assessment method based on structural distortion measurement to measure the quality instead of peak signal to noise rations (PSNR) and mean squared error (MSE). It is concluded that our Hybrid DCT offers similar quality performance to the Loeffler, and leads to 25% power consumption and 27% chip area savings.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.12 pp.3500-3507

Publication Date: 2005/12/01

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DOI: 10.1093/ietfec/e88-a.12.3500

Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

Category: VLSI Architecture

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Chi-Chia SUNG, Shanq-Jang RUAN, Bo-Yao LIN, Mon-Chau SHIE, "Quality and Power Efficient Architecture for the Discrete Cosine Transform" in IEICE TRANSACTIONS on Fundamentals, vol. E88-A, no. 12, pp. 3500-3507, December 2005, doi: 10.1093/ietfec/e88-a.12.3500.
Abstract: In recent years, the demand for multimedia mobile battery-operated devices has created a need for low power implementation of video compression. Many compression standards require the discrete cosine transform (DCT) function to perform image/video compression. For this reason, low power DCT design has become more and more important in today's image/video processing. This paper presents a new power-efficient Hybrid DCT architecture which combines Loeffler DCT and binDCT in terms of special property on luminance and chrominance difference. We use Synopsys PrimePower to estimate the power consumption in a TSMC 0.25-µm technology. Besides, we also adopt a novel quality assessment method based on structural distortion measurement to measure the quality instead of peak signal to noise rations (PSNR) and mean squared error (MSE). It is concluded that our Hybrid DCT offers similar quality performance to the Loeffler, and leads to 25% power consumption and 27% chip area savings.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.12.3500/_p

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@ARTICLE{e88-a_12_3500,
author={Chi-Chia SUNG, Shanq-Jang RUAN, Bo-Yao LIN, Mon-Chau SHIE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Quality and Power Efficient Architecture for the Discrete Cosine Transform},
year={2005},
volume={E88-A},
number={12},
pages={3500-3507},
abstract={In recent years, the demand for multimedia mobile battery-operated devices has created a need for low power implementation of video compression. Many compression standards require the discrete cosine transform (DCT) function to perform image/video compression. For this reason, low power DCT design has become more and more important in today's image/video processing. This paper presents a new power-efficient Hybrid DCT architecture which combines Loeffler DCT and binDCT in terms of special property on luminance and chrominance difference. We use Synopsys PrimePower to estimate the power consumption in a TSMC 0.25-µm technology. Besides, we also adopt a novel quality assessment method based on structural distortion measurement to measure the quality instead of peak signal to noise rations (PSNR) and mean squared error (MSE). It is concluded that our Hybrid DCT offers similar quality performance to the Loeffler, and leads to 25% power consumption and 27% chip area savings.},
keywords={},
doi={10.1093/ietfec/e88-a.12.3500},
ISSN={},
month={December},}

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TY - JOUR
TI - Quality and Power Efficient Architecture for the Discrete Cosine Transform
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3500
EP - 3507
AU - Chi-Chia SUNG
AU - Shanq-Jang RUAN
AU - Bo-Yao LIN
AU - Mon-Chau SHIE
PY - 2005
DO - 10.1093/ietfec/e88-a.12.3500
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2005
AB - In recent years, the demand for multimedia mobile battery-operated devices has created a need for low power implementation of video compression. Many compression standards require the discrete cosine transform (DCT) function to perform image/video compression. For this reason, low power DCT design has become more and more important in today's image/video processing. This paper presents a new power-efficient Hybrid DCT architecture which combines Loeffler DCT and binDCT in terms of special property on luminance and chrominance difference. We use Synopsys PrimePower to estimate the power consumption in a TSMC 0.25-µm technology. Besides, we also adopt a novel quality assessment method based on structural distortion measurement to measure the quality instead of peak signal to noise rations (PSNR) and mean squared error (MSE). It is concluded that our Hybrid DCT offers similar quality performance to the Loeffler, and leads to 25% power consumption and 27% chip area savings.
ER -