In this paper, we propose a new algorithm for calculating the exact poles of the admittance matrix of RLCG interconnects. After choosing dominant poles and corresponding residues, each element of the exact admittance matrix is approximated by partial fraction. A procedure to obtain the residues that guarantee the passivity is also provided, based on experimental studies. In the procedure the residues are calculated by using the least squares method so that the partial fraction matches each element of the exact admittance matrix in the frequency-domain. From the partial fraction representation, the asymptotic equivalent circuit models which can be easily simulated with SPICE are synthesized. It is shown that an efficient model-order reduction is possible for short-length interconnects.
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Junji KAWATA, Yuichi TANJI, Yoshifumi NISHIO, Akio USHIDA, "A Reduction Technique for RLCG Interconnects Using Least Squares Method" in IEICE TRANSACTIONS on Fundamentals,
vol. E88-A, no. 2, pp. 513-523, February 2005, doi: 10.1093/ietfec/e88-a.2.513.
Abstract: In this paper, we propose a new algorithm for calculating the exact poles of the admittance matrix of RLCG interconnects. After choosing dominant poles and corresponding residues, each element of the exact admittance matrix is approximated by partial fraction. A procedure to obtain the residues that guarantee the passivity is also provided, based on experimental studies. In the procedure the residues are calculated by using the least squares method so that the partial fraction matches each element of the exact admittance matrix in the frequency-domain. From the partial fraction representation, the asymptotic equivalent circuit models which can be easily simulated with SPICE are synthesized. It is shown that an efficient model-order reduction is possible for short-length interconnects.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.2.513/_p
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@ARTICLE{e88-a_2_513,
author={Junji KAWATA, Yuichi TANJI, Yoshifumi NISHIO, Akio USHIDA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Reduction Technique for RLCG Interconnects Using Least Squares Method},
year={2005},
volume={E88-A},
number={2},
pages={513-523},
abstract={In this paper, we propose a new algorithm for calculating the exact poles of the admittance matrix of RLCG interconnects. After choosing dominant poles and corresponding residues, each element of the exact admittance matrix is approximated by partial fraction. A procedure to obtain the residues that guarantee the passivity is also provided, based on experimental studies. In the procedure the residues are calculated by using the least squares method so that the partial fraction matches each element of the exact admittance matrix in the frequency-domain. From the partial fraction representation, the asymptotic equivalent circuit models which can be easily simulated with SPICE are synthesized. It is shown that an efficient model-order reduction is possible for short-length interconnects.},
keywords={},
doi={10.1093/ietfec/e88-a.2.513},
ISSN={},
month={February},}
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TY - JOUR
TI - A Reduction Technique for RLCG Interconnects Using Least Squares Method
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 513
EP - 523
AU - Junji KAWATA
AU - Yuichi TANJI
AU - Yoshifumi NISHIO
AU - Akio USHIDA
PY - 2005
DO - 10.1093/ietfec/e88-a.2.513
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2005
AB - In this paper, we propose a new algorithm for calculating the exact poles of the admittance matrix of RLCG interconnects. After choosing dominant poles and corresponding residues, each element of the exact admittance matrix is approximated by partial fraction. A procedure to obtain the residues that guarantee the passivity is also provided, based on experimental studies. In the procedure the residues are calculated by using the least squares method so that the partial fraction matches each element of the exact admittance matrix in the frequency-domain. From the partial fraction representation, the asymptotic equivalent circuit models which can be easily simulated with SPICE are synthesized. It is shown that an efficient model-order reduction is possible for short-length interconnects.
ER -