A Wide-Band LCD Segment Driver IC without Sacrificing Low Output-Offset Variation

Tetsuro ITAKURA; Takeshi SHIMA; Shigeru YAMADA; Hironori MINAMIZAKI

A Wide-Band LCD Segment Driver IC without Sacrificing Low Output-Offset Variation

Tetsuro ITAKURA, Takeshi SHIMA, Shigeru YAMADA, Hironori MINAMIZAKI

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This paper describes a segment driver IC for high-quality liquid-crystal-displays (LCDs). Major design issues in the segment driver IC are a wide signal bandwidth and excessive output-offset variation both within a chip and between chips. After clarifying the trade-off relation between the signal bandwidth and the output-offset variation originated from conventional sample-and-hold (S/H) circuits, two wide-band S/H circuits with low output-offset variation have been introduced. The basic ideas for the proposed S/H circuits are to improve timing of the sampling pulses applied to MOS analog switches and to prevent channel charge injection onto a storage capacitor when the switches turn off. The inter-chip offset-cancellation technique has been also introduced by using an additional S/H circuit. Two test chips were implemented using the above S/H circuits for demonstration purposes. The intra-chip output-offset standard deviation of 9.5 mV_rms with a 3dB bandwidth of 50 MHz was achieved. The inter-chip output-offset standard deviation was reduced to 5.1 mV_rms by using the inter-chip offset-cancellation technique. The evaluation of picture quality of an LCD using the chips shows the applicability of the proposed approaches to displays used for multimedia applications.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E77-A No.2 pp.380-387

Publication Date: 1994/02/25

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Type of Manuscript: Special Section PAPER (Special Section on High-Performance MOS Analog Circuits)

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Tetsuro ITAKURA, Takeshi SHIMA, Shigeru YAMADA, Hironori MINAMIZAKI, "A Wide-Band LCD Segment Driver IC without Sacrificing Low Output-Offset Variation" in IEICE TRANSACTIONS on Fundamentals, vol. E77-A, no. 2, pp. 380-387, February 1994, doi: .
Abstract: This paper describes a segment driver IC for high-quality liquid-crystal-displays (LCDs). Major design issues in the segment driver IC are a wide signal bandwidth and excessive output-offset variation both within a chip and between chips. After clarifying the trade-off relation between the signal bandwidth and the output-offset variation originated from conventional sample-and-hold (S/H) circuits, two wide-band S/H circuits with low output-offset variation have been introduced. The basic ideas for the proposed S/H circuits are to improve timing of the sampling pulses applied to MOS analog switches and to prevent channel charge injection onto a storage capacitor when the switches turn off. The inter-chip offset-cancellation technique has been also introduced by using an additional S/H circuit. Two test chips were implemented using the above S/H circuits for demonstration purposes. The intra-chip output-offset standard deviation of 9.5 mV_rms with a 3dB bandwidth of 50 MHz was achieved. The inter-chip output-offset standard deviation was reduced to 5.1 mV_rms by using the inter-chip offset-cancellation technique. The evaluation of picture quality of an LCD using the chips shows the applicability of the proposed approaches to displays used for multimedia applications.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e77-a_2_380/_p

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@ARTICLE{e77-a_2_380,
author={Tetsuro ITAKURA, Takeshi SHIMA, Shigeru YAMADA, Hironori MINAMIZAKI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Wide-Band LCD Segment Driver IC without Sacrificing Low Output-Offset Variation},
year={1994},
volume={E77-A},
number={2},
pages={380-387},
abstract={This paper describes a segment driver IC for high-quality liquid-crystal-displays (LCDs). Major design issues in the segment driver IC are a wide signal bandwidth and excessive output-offset variation both within a chip and between chips. After clarifying the trade-off relation between the signal bandwidth and the output-offset variation originated from conventional sample-and-hold (S/H) circuits, two wide-band S/H circuits with low output-offset variation have been introduced. The basic ideas for the proposed S/H circuits are to improve timing of the sampling pulses applied to MOS analog switches and to prevent channel charge injection onto a storage capacitor when the switches turn off. The inter-chip offset-cancellation technique has been also introduced by using an additional S/H circuit. Two test chips were implemented using the above S/H circuits for demonstration purposes. The intra-chip output-offset standard deviation of 9.5 mV_rms with a 3dB bandwidth of 50 MHz was achieved. The inter-chip output-offset standard deviation was reduced to 5.1 mV_rms by using the inter-chip offset-cancellation technique. The evaluation of picture quality of an LCD using the chips shows the applicability of the proposed approaches to displays used for multimedia applications.},
keywords={},
doi={},
ISSN={},
month={February},}

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TY - JOUR
TI - A Wide-Band LCD Segment Driver IC without Sacrificing Low Output-Offset Variation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 380
EP - 387
AU - Tetsuro ITAKURA
AU - Takeshi SHIMA
AU - Shigeru YAMADA
AU - Hironori MINAMIZAKI
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E77-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1994
AB - This paper describes a segment driver IC for high-quality liquid-crystal-displays (LCDs). Major design issues in the segment driver IC are a wide signal bandwidth and excessive output-offset variation both within a chip and between chips. After clarifying the trade-off relation between the signal bandwidth and the output-offset variation originated from conventional sample-and-hold (S/H) circuits, two wide-band S/H circuits with low output-offset variation have been introduced. The basic ideas for the proposed S/H circuits are to improve timing of the sampling pulses applied to MOS analog switches and to prevent channel charge injection onto a storage capacitor when the switches turn off. The inter-chip offset-cancellation technique has been also introduced by using an additional S/H circuit. Two test chips were implemented using the above S/H circuits for demonstration purposes. The intra-chip output-offset standard deviation of 9.5 mV_rms with a 3dB bandwidth of 50 MHz was achieved. The inter-chip output-offset standard deviation was reduced to 5.1 mV_rms by using the inter-chip offset-cancellation technique. The evaluation of picture quality of an LCD using the chips shows the applicability of the proposed approaches to displays used for multimedia applications.
ER -