An Offset-Compensated CMOS Programmable Gain Amplifier

Takafumi YAMAJI; Tetsuro ITAKURA

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Takafumi YAMAJI, Tetsuro ITAKURA, "An Offset-Compensated CMOS Programmable Gain Amplifier" in IEICE TRANSACTIONS on Fundamentals, vol. E80-A, no. 2, pp. 353-355, February 1997, doi: .
Abstract: A CMOS programmable gain amplifier (PGA) with a swiched capacitor offset compensation circuit is described. The mean compensation error is 130µV at the input, and the standard deviation of the compensation error is 50µV. This PGA is applicable to a baseband amplifier for digital radio communication terminals.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e80-a_2_353/_p

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@ARTICLE{e80-a_2_353,
author={Takafumi YAMAJI, Tetsuro ITAKURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Offset-Compensated CMOS Programmable Gain Amplifier},
year={1997},
volume={E80-A},
number={2},
pages={353-355},
abstract={A CMOS programmable gain amplifier (PGA) with a swiched capacitor offset compensation circuit is described. The mean compensation error is 130µV at the input, and the standard deviation of the compensation error is 50µV. This PGA is applicable to a baseband amplifier for digital radio communication terminals.},
keywords={},
doi={},
ISSN={},
month={February},}

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TY - JOUR
TI - An Offset-Compensated CMOS Programmable Gain Amplifier
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 353
EP - 355
AU - Takafumi YAMAJI
AU - Tetsuro ITAKURA
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E80-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1997
AB - A CMOS programmable gain amplifier (PGA) with a swiched capacitor offset compensation circuit is described. The mean compensation error is 130µV at the input, and the standard deviation of the compensation error is 50µV. This PGA is applicable to a baseband amplifier for digital radio communication terminals.
ER -