10 µA Quiescent Current Opamp Design for LCD Driver ICs

Tetsuro ITAKURA; Hironori MINAMIZAKI

10 µA Quiescent Current Opamp Design for LCD Driver ICs

Tetsuro ITAKURA, Hironori MINAMIZAKI

Full Text Views

0

Share
Cite this

Summary :

This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E81-A No.2 pp.230-236

Publication Date: 1998/02/25

Publicized

Online ISSN

DOI

Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era)

Category

Cite this

Copy

Tetsuro ITAKURA, Hironori MINAMIZAKI, "10 µA Quiescent Current Opamp Design for LCD Driver ICs" in IEICE TRANSACTIONS on Fundamentals, vol. E81-A, no. 2, pp. 230-236, February 1998, doi: .
Abstract: This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e81-a_2_230/_p

Copy

@ARTICLE{e81-a_2_230,
author={Tetsuro ITAKURA, Hironori MINAMIZAKI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={10 µA Quiescent Current Opamp Design for LCD Driver ICs},
year={1998},
volume={E81-A},
number={2},
pages={230-236},
abstract={This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.},
keywords={},
doi={},
ISSN={},
month={February},}

Copy

TY - JOUR
TI - 10 µA Quiescent Current Opamp Design for LCD Driver ICs
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 230
EP - 236
AU - Tetsuro ITAKURA
AU - Hironori MINAMIZAKI
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E81-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1998
AB - This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.
ER -