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Maximum Output Power Design on an 85kHz Class-D Half-bridge ZVS Inverter with Power-MOSFETs
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- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.0 No.0 pp.0-0
- Publicized
- 2024/11/12
- DOI
- 10.1587/10.1587/transfun.2024EAP1074
- Type of Manuscript
- PAPER
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Yi XIONG, Senanayake THILAK, Daisuke ARAI, Jun IMAOKA, Masayoshi YAMAMOTO, "Maximum Output Power Design on an 85kHz Class-D Half-bridge ZVS Inverter with Power-MOSFETs" in IEICE TRANSACTIONS on Fundamentals,
vol. , no. 0, pp. 0-0, January , doi: 10.1587/10.1587/transfun.2024EAP1074.
Abstract:
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/transfun.2024EAP1074/_advpub_f
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@ARTICLE{2024EAP1074,
author={Yi XIONG, Senanayake THILAK, Daisuke ARAI, Jun IMAOKA, Masayoshi YAMAMOTO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Maximum Output Power Design on an 85kHz Class-D Half-bridge ZVS Inverter with Power-MOSFETs},
year={},
volume={},
number={0},
pages={0-0},
abstract={},
keywords={},
doi={10.1587/10.1587/transfun.2024EAP1074},
ISSN={},
month={January},}
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TY - JOUR
TI - Maximum Output Power Design on an 85kHz Class-D Half-bridge ZVS Inverter with Power-MOSFETs
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 0
EP - 0
AU - Yi XIONG
AU - Senanayake THILAK
AU - Daisuke ARAI
AU - Jun IMAOKA
AU - Masayoshi YAMAMOTO
PY -
DO - 10.1587/10.1587/transfun.2024EAP1074
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL -
IS - 0
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January
AB -
ER -
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