In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.
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Kyung-Ju CHO, Jin-Gyun CHUNG, "Adaptive Error Compensation for Low Error Fixed-Width Squarers" in IEICE TRANSACTIONS on Information,
vol. E90-D, no. 3, pp. 621-626, March 2007, doi: 10.1093/ietisy/e90-d.3.621.
Abstract: In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.
URL: https://globals.ieice.org/en_transactions/information/10.1093/ietisy/e90-d.3.621/_p
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@ARTICLE{e90-d_3_621,
author={Kyung-Ju CHO, Jin-Gyun CHUNG, },
journal={IEICE TRANSACTIONS on Information},
title={Adaptive Error Compensation for Low Error Fixed-Width Squarers},
year={2007},
volume={E90-D},
number={3},
pages={621-626},
abstract={In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.},
keywords={},
doi={10.1093/ietisy/e90-d.3.621},
ISSN={1745-1361},
month={March},}
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TY - JOUR
TI - Adaptive Error Compensation for Low Error Fixed-Width Squarers
T2 - IEICE TRANSACTIONS on Information
SP - 621
EP - 626
AU - Kyung-Ju CHO
AU - Jin-Gyun CHUNG
PY - 2007
DO - 10.1093/ietisy/e90-d.3.621
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E90-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2007
AB - In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.
ER -