MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications

Ye GAO; Masayuki SATO; Ryusuke EGAWA; Hiroyuki TAKIZAWA; Hiroaki KOBAYASHI

doi:10.1587/transinf.2014EDP7227

MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications

Ye GAO, Masayuki SATO, Ryusuke EGAWA, Hiroyuki TAKIZAWA, Hiroaki KOBAYASHI

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Vector processors have significant advantages for next generation multimedia applications (MMAs). One of the advantages is that vector processors can achieve high data transfer performance by using a high bandwidth memory sub-system, resulting in a high sustained computing performance. However, the high bandwidth memory sub-system usually leads to enormous costs in terms of chip area, power and energy consumption. These costs are too expensive for commodity computer systems, which are the main execution platform of MMAs. This paper proposes a new multi-banked cache memory for commodity computer systems called MVP-cache in order to expand the potential of vector architectures on MMAs. Unlike conventional multi-banked cache memories, which employ one tag array and one data array in a sub-cache, MVP-cache associates one tag array with multiple independent data arrays of small-sized cache lines. In this way, MVP-cache realizes less static power consumption on its tag arrays. MVP-cache can also achieve high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array.

Publication: IEICE TRANSACTIONS on Information Vol.E97-D No.11 pp.2835-2843

Publication Date: 2014/11/01

Publicized: 2014/08/22

Online ISSN: 1745-1361

DOI: 10.1587/transinf.2014EDP7227

Type of Manuscript: PAPER

Category: Computer System

Authors

Ye GAO
  Tohoku University
Masayuki SATO
  Tohoku University,JST CREST
Ryusuke EGAWA
  Tohoku University,JST CREST
Hiroyuki TAKIZAWA
  Tohoku University,JST CREST
Hiroaki KOBAYASHI
  Tohoku University,JST CREST

Keyword

vector architecture, multimedia application, multi-banked cache memory

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Ye GAO, Masayuki SATO, Ryusuke EGAWA, Hiroyuki TAKIZAWA, Hiroaki KOBAYASHI, "MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications" in IEICE TRANSACTIONS on Information, vol. E97-D, no. 11, pp. 2835-2843, November 2014, doi: 10.1587/transinf.2014EDP7227.
Abstract: Vector processors have significant advantages for next generation multimedia applications (MMAs). One of the advantages is that vector processors can achieve high data transfer performance by using a high bandwidth memory sub-system, resulting in a high sustained computing performance. However, the high bandwidth memory sub-system usually leads to enormous costs in terms of chip area, power and energy consumption. These costs are too expensive for commodity computer systems, which are the main execution platform of MMAs. This paper proposes a new multi-banked cache memory for commodity computer systems called MVP-cache in order to expand the potential of vector architectures on MMAs. Unlike conventional multi-banked cache memories, which employ one tag array and one data array in a sub-cache, MVP-cache associates one tag array with multiple independent data arrays of small-sized cache lines. In this way, MVP-cache realizes less static power consumption on its tag arrays. MVP-cache can also achieve high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array.
URL: https://globals.ieice.org/en_transactions/information/10.1587/transinf.2014EDP7227/_p

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@ARTICLE{e97-d_11_2835,
author={Ye GAO, Masayuki SATO, Ryusuke EGAWA, Hiroyuki TAKIZAWA, Hiroaki KOBAYASHI, },
journal={IEICE TRANSACTIONS on Information},
title={MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications},
year={2014},
volume={E97-D},
number={11},
pages={2835-2843},
abstract={Vector processors have significant advantages for next generation multimedia applications (MMAs). One of the advantages is that vector processors can achieve high data transfer performance by using a high bandwidth memory sub-system, resulting in a high sustained computing performance. However, the high bandwidth memory sub-system usually leads to enormous costs in terms of chip area, power and energy consumption. These costs are too expensive for commodity computer systems, which are the main execution platform of MMAs. This paper proposes a new multi-banked cache memory for commodity computer systems called MVP-cache in order to expand the potential of vector architectures on MMAs. Unlike conventional multi-banked cache memories, which employ one tag array and one data array in a sub-cache, MVP-cache associates one tag array with multiple independent data arrays of small-sized cache lines. In this way, MVP-cache realizes less static power consumption on its tag arrays. MVP-cache can also achieve high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array.},
keywords={},
doi={10.1587/transinf.2014EDP7227},
ISSN={1745-1361},
month={November},}

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TY - JOUR
TI - MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications
T2 - IEICE TRANSACTIONS on Information
SP - 2835
EP - 2843
AU - Ye GAO
AU - Masayuki SATO
AU - Ryusuke EGAWA
AU - Hiroyuki TAKIZAWA
AU - Hiroaki KOBAYASHI
PY - 2014
DO - 10.1587/transinf.2014EDP7227
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E97-D
IS - 11
JA - IEICE TRANSACTIONS on Information
Y1 - November 2014
AB - Vector processors have significant advantages for next generation multimedia applications (MMAs). One of the advantages is that vector processors can achieve high data transfer performance by using a high bandwidth memory sub-system, resulting in a high sustained computing performance. However, the high bandwidth memory sub-system usually leads to enormous costs in terms of chip area, power and energy consumption. These costs are too expensive for commodity computer systems, which are the main execution platform of MMAs. This paper proposes a new multi-banked cache memory for commodity computer systems called MVP-cache in order to expand the potential of vector architectures on MMAs. Unlike conventional multi-banked cache memories, which employ one tag array and one data array in a sub-cache, MVP-cache associates one tag array with multiple independent data arrays of small-sized cache lines. In this way, MVP-cache realizes less static power consumption on its tag arrays. MVP-cache can also achieve high efficiency on short vector data transfers because the flexibility of data transfers can be improved by independently controlling the data transfers of each data array.
ER -