Detecting Hardware Trojan through Time Domain Constrained Estimator Based Unified Subspace Technique

Mingfu XUE; Wei LIU; Aiqun HU; Youdong WANG

doi:10.1587/transinf.E97.D.606

Detecting Hardware Trojan through Time Domain Constrained Estimator Based Unified Subspace Technique

Mingfu XUE, Wei LIU, Aiqun HU, Youdong WANG

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Hardware Trojan (HT) has emerged as an impending security threat to hardware systems. However, conventional functional tests fail to detect HT since Trojans are triggered by rare events. Most of the existing side-channel based HT detection techniques just simply compare and analyze circuit's parameters and offer no signal calibration or error correction properties, so they suffer from the challenge and interference of large process variations (PV) and noises in modern nanotechnology which can completely mask Trojan's contribution to the circuit. This paper presents a novel HT detection method based on subspace technique which can detect tiny HT characteristics under large PV and noises. First, we formulate the HT detection problem as a weak signal detection problem, and then we model it as a feature extraction model. After that, we propose a novel subspace HT detection technique based on time domain constrained estimator. It is proved that we can distinguish the weak HT from variations and noises through particular subspace projections and reconstructed clean signal analysis. The reconstructed clean signal of the proposed algorithm can also be used for accurate parameter estimation of circuits, e.g. power estimation. The proposed technique is a general method for related HT detection schemes to eliminate noises and PV. Both simulations on benchmarks and hardware implementation validations on FPGA boards show the effectiveness and high sensitivity of the new HT detection technique.

Publication: IEICE TRANSACTIONS on Information Vol.E97-D No.3 pp.606-609

Publication Date: 2014/03/01

Publicized

Online ISSN: 1745-1361

DOI: 10.1587/transinf.E97.D.606

Type of Manuscript: LETTER

Category: Dependable Computing

Authors

Mingfu XUE
  Southeast University,Nanyang Technological University
Wei LIU
  Southeast University
Aiqun HU
  Southeast University
Youdong WANG
  Southeast University

Keyword

information security, hardware security, hardware Trojan detection, unified subspace technique, time domain constrained estimator

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Mingfu XUE, Wei LIU, Aiqun HU, Youdong WANG, "Detecting Hardware Trojan through Time Domain Constrained Estimator Based Unified Subspace Technique" in IEICE TRANSACTIONS on Information, vol. E97-D, no. 3, pp. 606-609, March 2014, doi: 10.1587/transinf.E97.D.606.
Abstract: Hardware Trojan (HT) has emerged as an impending security threat to hardware systems. However, conventional functional tests fail to detect HT since Trojans are triggered by rare events. Most of the existing side-channel based HT detection techniques just simply compare and analyze circuit's parameters and offer no signal calibration or error correction properties, so they suffer from the challenge and interference of large process variations (PV) and noises in modern nanotechnology which can completely mask Trojan's contribution to the circuit. This paper presents a novel HT detection method based on subspace technique which can detect tiny HT characteristics under large PV and noises. First, we formulate the HT detection problem as a weak signal detection problem, and then we model it as a feature extraction model. After that, we propose a novel subspace HT detection technique based on time domain constrained estimator. It is proved that we can distinguish the weak HT from variations and noises through particular subspace projections and reconstructed clean signal analysis. The reconstructed clean signal of the proposed algorithm can also be used for accurate parameter estimation of circuits, e.g. power estimation. The proposed technique is a general method for related HT detection schemes to eliminate noises and PV. Both simulations on benchmarks and hardware implementation validations on FPGA boards show the effectiveness and high sensitivity of the new HT detection technique.
URL: https://globals.ieice.org/en_transactions/information/10.1587/transinf.E97.D.606/_p

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@ARTICLE{e97-d_3_606,
author={Mingfu XUE, Wei LIU, Aiqun HU, Youdong WANG, },
journal={IEICE TRANSACTIONS on Information},
title={Detecting Hardware Trojan through Time Domain Constrained Estimator Based Unified Subspace Technique},
year={2014},
volume={E97-D},
number={3},
pages={606-609},
abstract={Hardware Trojan (HT) has emerged as an impending security threat to hardware systems. However, conventional functional tests fail to detect HT since Trojans are triggered by rare events. Most of the existing side-channel based HT detection techniques just simply compare and analyze circuit's parameters and offer no signal calibration or error correction properties, so they suffer from the challenge and interference of large process variations (PV) and noises in modern nanotechnology which can completely mask Trojan's contribution to the circuit. This paper presents a novel HT detection method based on subspace technique which can detect tiny HT characteristics under large PV and noises. First, we formulate the HT detection problem as a weak signal detection problem, and then we model it as a feature extraction model. After that, we propose a novel subspace HT detection technique based on time domain constrained estimator. It is proved that we can distinguish the weak HT from variations and noises through particular subspace projections and reconstructed clean signal analysis. The reconstructed clean signal of the proposed algorithm can also be used for accurate parameter estimation of circuits, e.g. power estimation. The proposed technique is a general method for related HT detection schemes to eliminate noises and PV. Both simulations on benchmarks and hardware implementation validations on FPGA boards show the effectiveness and high sensitivity of the new HT detection technique.},
keywords={},
doi={10.1587/transinf.E97.D.606},
ISSN={1745-1361},
month={March},}

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TY - JOUR
TI - Detecting Hardware Trojan through Time Domain Constrained Estimator Based Unified Subspace Technique
T2 - IEICE TRANSACTIONS on Information
SP - 606
EP - 609
AU - Mingfu XUE
AU - Wei LIU
AU - Aiqun HU
AU - Youdong WANG
PY - 2014
DO - 10.1587/transinf.E97.D.606
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E97-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2014
AB - Hardware Trojan (HT) has emerged as an impending security threat to hardware systems. However, conventional functional tests fail to detect HT since Trojans are triggered by rare events. Most of the existing side-channel based HT detection techniques just simply compare and analyze circuit's parameters and offer no signal calibration or error correction properties, so they suffer from the challenge and interference of large process variations (PV) and noises in modern nanotechnology which can completely mask Trojan's contribution to the circuit. This paper presents a novel HT detection method based on subspace technique which can detect tiny HT characteristics under large PV and noises. First, we formulate the HT detection problem as a weak signal detection problem, and then we model it as a feature extraction model. After that, we propose a novel subspace HT detection technique based on time domain constrained estimator. It is proved that we can distinguish the weak HT from variations and noises through particular subspace projections and reconstructed clean signal analysis. The reconstructed clean signal of the proposed algorithm can also be used for accurate parameter estimation of circuits, e.g. power estimation. The proposed technique is a general method for related HT detection schemes to eliminate noises and PV. Both simulations on benchmarks and hardware implementation validations on FPGA boards show the effectiveness and high sensitivity of the new HT detection technique.
ER -