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[Author] Tatsuya YAMAZAKI(10hit)

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  • Spline-based QoS Mapping Mechanisms for Hierarchical Multilevel QoS Models

    Tatsuya YAMAZAKI  

     
    LETTER

      Vol:
    E85-A No:6
      Page(s):
    1349-1351

    A generic multilevel quality-of-service (QoS) model for distributed multimedia applications is presented. QoS mapping mechanisms are required to translate the QoS parameters among the hierarchical levels. One QoS mapping mechanism based on the spline functions is proposed, hence two splines are compared. One is natural splines and the other is B-splines. QoS measurement experiments were conducted, and it is found that the B-splines give more accurate mapping results than the natural splines once the knots for the splines are selected appropriately.

  • MARM: An Agent-Based Adaptive QoS Management Framework

    Tatsuya YAMAZAKI  Masakatsu KOSUGA  Nagao OGINO  Jun MATSUDA  

     
    PAPER-Network

      Vol:
    E84-B No:1
      Page(s):
    63-70

    For distributed multimedia applications, the development of adaptive QoS (quality of service) management mechanisms is needed to guarantee various and changeable end-to-end QoS requirements. In this paper, we propose an adaptive QoS management framework based on multi-agent systems. In this framework, QoS management mechanisms are divided into two phases, the flow establishment and renegotiation phase and the media-transfer phase. An adaptation to system resource changes and various user requirements is accomplished by direct or indirect collaborations of the agents in each phase. In the flow establishment and renegotiation phase, application agents determine optimal resource allocation with QoS negotiations to maximize the total users' utility. In the media-transfer phase, stream agents collaborate to adjust each stream QoS reactively. In addition, personal agents help a novice user to specify stream QoS without any a priori knowledge of QoS. To make the interworking of agents tractable, a QoS mapping mechanism is needed to translate the QoS parameters from level to level, since the expression of QoS differs from level to level. As an example of multimedia application based on the proposed framework, a one-way video system is designed. The experimental results of computer simulation show the validity of the proposed framework.

  • Fabrication and Delay Time Analysis of Deep Submicron CMOS Devices

    Yasuo NARA  Manabu DEURA  Ken-ichi GOTO  Tatsuya YAMAZAKI  Tetsu FUKANO  Toshihiro SUGII  

     
    PAPER

      Vol:
    E78-C No:3
      Page(s):
    293-298

    This paper describes the fabrication of 0.1 µm gate length CMOS devices and analysis of delay time by circuit simulation. In order to reduce the gate resistance, TiN capped cobalt salicide technology is applied to the fabrication of 0.1 µm CMOS devices. Gate sheet resistance with a 0.1 µm gate is as low as 5 Ω/sq. Propagation delay times of 0.1 µm and 0.15 µm CMOS inverter are 21 ps and 36 ps. Simulated propagation delay time agreed fairly well with experimental results. For gate length over 0.15 µm, intrinsic delay in CMOS devices is the main dalay factor. This suggests that increasing current drivability is the most efficient way to improve propagation delay time. At 0.1 µm, each parasitic component and intrinsic delay have similar contributions on device speed due to the short channel effect. To improve delay time, we used rapid thermal annealing or a high dose LDD structure. With this structure, drain current increases by more than 1.3 times and simulation predicted a delay time of 28 ps is possible with 0.15 µm CMOS inverters.

  • High-Speed SOI Bipolar Transistors Using Bonding and Thinning Techniques

    Manabu KOJIMA  Atsushi FUKURODA  Tetsu FUKANO  Naoshi HIGAKI  Tatsuya YAMAZAKI  Toshihiro SUGII  Yoshihiro ARIMOTO  Takashi ITO  

     
    PAPER-Device Technology

      Vol:
    E76-C No:4
      Page(s):
    572-576

    We propose a high-speed SOI bipolar transistor fabricated using bonding and thinning techniques. It is important to replace SOI area except for devices with thick SiO2 to reduce parasitic capacitance. A thin SOI film with a thin buried layer helps meet this requirement. We formed a 1-µm-thick SOI film with a 0.7-µm-thick buried layer by ion implantation before wafer bonding pulse-field-assisted bonding and selective polishing. Devices were completely isolated by thick SiO2 using a thin SOI film and the LOCOS process. We fabricated epitaxial base transistors (EBTs) on bonded SOI. Our transistors had a cutoff frequency of 32 GHz.

  • A Scalable Resource Allocation Scheme over DiffServ towards End-to-end QoS Assurance

    Andreas ALEXELIS  Tatsuya YAMAZAKI  Kazuo HASUIKE  

     
    PAPER-Internet Technologies

      Vol:
    E84-B No:12
      Page(s):
    3113-3123

    In recent years, the concept of Quality of Service (QoS) has gained attention in the network research community and its extension towards delivering QoS level assurance to sensitive applications has generally been agreed to be crucial for the longevity and usability of the Internet. On the Internet, the Differentiated Services (DiffServ) architecture is a general framework for the differentiated treatment of traffic aggregates in the core network. However, DiffServ does not extend to end-to-end QoS assurance. In this paper, we propose a simple resource-brokering scheme operating over a hierarchically connected internetwork of administratively-independent DiffServ-capable domains that is a simplified model of the Internet. The proposed asynchronous, multi-agent resource-brokering scheme operates locally but avoids conflicts globally. In this way, the traffic control reflects the underlying structure of the internetwork, introduces only a localized complexity thus scaling up well, and permits independent policies between the interconnected domains.

  • Quality of Experience (QoE) Studies: Present State and Future Prospect Open Access

    Tatsuya YAMAZAKI  

     
    INVITED PAPER

      Pubricized:
    2021/02/04
      Vol:
    E104-B No:7
      Page(s):
    716-724

    With the spread of the broadband Internet and high-performance devices, various services have become available anytime, anywhere. As a result, attention is focused on the service quality and Quality of Experience (QoE) is emphasized as an evaluation index from the user's viewpoint. Since QoE is a subjective evaluation metric and deeply involved with user perception and expectation, quantitative and comparative research was difficult because the QoE study is still in its infancy. At present, after tremendous devoted efforts have contributed to this research area, a shape of the QoE management architecture has become clear. Moreover, not only for research but also for business, video streaming services are expected as a promising Internet service incorporating QoE. This paper reviews the present state of QoE studies with the above background and describes the future prospect of QoE. Firstly, the historical aspects of QoE is reviewed starting with QoS (Quality of Service). Secondly, a QoE management architecture is proposed in this paper, which consists of QoE measurement, QoE assessment, QoS-QoE mapping, QoE modeling, and QoE adaptation. Thirdly, QoE studies related with video streaming services are introduced, and finally individual QoE and physiology-based QoE measurement methodologies are explained as future prospect in the field of QoE studies.

  • Ti Salicide Process for Subquarter-Micron CMOS Devices

    Ken-ichi GOTO  Tatsuya YAMAZAKI  Yasuo NARA  Tetsu FUKANO  Toshihiro SUGII  Yoshihiro ARIMOTO  Takashi ITO  

     
    PAPER-Process Technology

      Vol:
    E77-C No:3
      Page(s):
    480-485

    Using Ti self-aligned silicide (salicide) process, we fabricated subquarter-micron complementary metal-oxide semiconductor (CMOS) devices, and studied the mechanism of increasing resistivity of TiSi2 on poly-Si gates from 0.075 to 20 µm long and 10 µm wide. In the gates less than 0.1 µm long, we found that agglomeration of TiSi2 takes place during low temperature annealing at 675 for 30 seconds leading to discontinuous TiSi2 lines. The discontinuity of TiSi2 abruptly increases the gate resistance, and remarkably reduces the circuit speed of CMOS ring oscillators. On the other hand, Raman spectroscopy reveals that the phase transition from high-resistivity C49 to low-resistivity C54 occurs in plane TiSi2 by annealing at 800 for 30 seconds, while it does not occur in TiSi2 gates less than 5 µm long. From these results we found that the gate sheet resistance can not be reduced to less than 5 Ω/sq by conventional Ti salicide technology in gates shorter than 0.4 µm due to increase in gate resistance caused by agglomeration and lack of phase transition.

  • FOREWORD Open Access

    Tatsuya YAMAZAKI  

     
    FOREWORD

      Vol:
    E96-B No:2
      Page(s):
    391-391
  • Adaptive Restoration of Degraded Binary MRF Images Using EM Method

    Tatsuya YAMAZAKI  Mehdi N.SHIRAZI  Hideki NODA  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E76-D No:2
      Page(s):
    259-268

    An adaptive restoration algorithm is developed for binary images degraded nonadditively with flip noises. The true image is assumed to be a realization of a Markov Random Field (MRF) and the nonadditive flip noises are assumed to be statistically independent and asymmetric. Using the Expectation and Maximization (EM) method and approximating the Baum's auxiliary function, the degraded image is restored iteratively. The algorithm is implemented as follows. First, the unknown parameters and the true image are guessed or estimated roughly. Second, using the true image estimate, the Baum's auxiliary function is approximated and then the noise and MRF parameters are reestimated. To reestimate the MRF parameters the Maximum Pseudo-likelihood (MPL) method is used. Third, using the Iterated Conditional Modes (ICM) method, the true image is reestimated. The second and third steps are carried out iteratively until by some ad hoc criterion a critical point of EM algorithm is approximated. A number of simulation examples are presented which show the effectiveness of the algorithm and the parameter estimation procedures.

  • Adaptive QoS Management for Multimedia Applications in Heterogeneous Environments: A Case Study with Video QoS Mediation

    Tatsuya YAMAZAKI  Jun MATSUDA  

     
    PAPER

      Vol:
    E82-B No:11
      Page(s):
    1801-1807

    In this paper we present a Quality of Service (QoS) management architecture for distributed multimedia applications in heterogeneous communication environments of wired and wireless networks. Gaps in network performance such as bandwidths and error rates between wired and wireless networks, as well as gaps in terminal performance in media handling between desktop computers and handheld computers, bring about heterogeneities. Furthermore, even performance gaps among various desktop computers cause heterogeneities. As a result of these heterogeneities in network and terminal performances and various user preferences, the QoS requirement from each receiver is different. Therefore, mechanisms that adjust and satisfy each QoS requirement are needed. We propose a proxy server called Communication Coordination Server (CCS), which intermediates a video server and a receiver and manages the QoS coordination. The CCS performs QoS admission, adjustment, and allocation mechanisms to satisfy the user's QoS requirement. Then transcoding is used to realize the allocated QoS, and it decodes the input video stream from the video server and encodes it within the CCS. A QoS mapping mechanism that translates application-level QoS into resource-level QoS is needed for the QoS admission. We also propose a new QoS mapping mechanism using spline functions that enables a continuous QoS translation. We have built a CCS prototype in our laboratory testbed, and have verified that the CCS can resolve the heterogeneities between the server and receiver by the QoS adjustment mechanism of the transcoding and the QoS admission.

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