As process technologies decrease below a hundred nanometers, the variability of circuit parameters increases, and statistical timing analysis, which analyzes the distribution of the critical delay of a circuit, is receiving a great deal of attention. In such statistical approaches, correlations between random variables are important to the accuracy of analysis. Since interconnect delays dominate in recent technology, their correlations are of primary concern in statistical timing analysis. In this paper, we propose an efficient algorithm for calculating correlation coefficients between Elmore interconnect delays with the use of Gaussian distributions. Our algorithm is efficient and yields reasonable results for correlations between interconnect delays of different nets. In order to evaluate the performance of the proposed algorithm, we show experimental results compared against Monte-Carlo simulations using SPICE.

This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to reduce the complexity of the circuits and a preconditioned Krylov-subspace iterative method is then used to perform the nodal analysis on the reduced circuits. By proper selection of the simulation time step and interval based on Elmore delays, the delay of the clock signal between the clock source and the sink node as well as the clock skews between the sink nodes can be computed efficiently and accurately. Our experimental results show that the proposed algorithm is two orders of magnitude faster than HSPICE without loss of accuracy and stability. The maximum error is within 0.4% of the exact delay time.