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[Keyword] HDTV(29hit)

21-29hit(29hit)

  • Single Chip Implementation of MPEG2 Decoder for HDTV Level Pictures

    Takao ONOYE  Toshihiro MASAKI  Yasuo MORIMOTO  Yoh SATO  Isao SHIRAKAWA  Kenji MATSUMURA  

     
    PAPER

      Vol:
    E79-A No:3
      Page(s):
    330-338

    A single chip MPEG2 MP@HL Video decoder has been developed, which consists mainly of specific functional units and macroblock level pipeline buffers. A new organization is also devised for a set of off-chip frame memories and the interfaces associated with it. Owing to sophisticated I/O interfaces among functional units, the macroblock level pipeline in conjunction with different decording facilities attains a high throughput to such an extent as to decode HDTV images in real time. Moreover, a set of these functional units, pipeline buffers, and frame memory interfaces, together with a sequence controller, is integrated for the first time in a single chip, which has the total area of 8.8 9.2mm2 with a 0.6µm triple-mental CMOS technology, and dissipates 1.2 W from a single 3.3 V supply.

  • Current Status of Future Television System Development

    Yuichi NINOMIYA  

     
    INVITED PAPER-Multimedia System LSIs

      Vol:
    E77-C No:12
      Page(s):
    1849-1858

    The current state of development of the television broadcasting system of the future is described with regard to LSI development. It is no need to say that television broadcasting systems are very huge and require a large number of inexpensive LSI's. Hi-Vision broadcasting has already been started in Japan. In the United States, a digital terrestrial broadcasting system (ATV) will be standardized in the near future. On the other hand, the situation in Europe remains unclear but MPEG-2 is now in the stage of system finarizing. We also hear much about "multimedia" but the concept of multimedia broadcasting still requires a lot of time to be translated into reality. Some important current technical topics and related basic technologies are also described in this paper. They include DCT, Hybrid DCT coding, error correcting coding, coded modulation, and improvement of the MUSE system. Finally, the discussion considers the relationship between system development and VLSI technology and the importance of mutual understanding between VLSI engineers and system designers. Some possible requirements for VLSI development are also stated.

  • Development of Improved Low Power MUSE (HDTV) Decoder Chip Set 2.5th Generation MUSE Chip Set

    Kiyoshi KOHIYAMA  Kota OTSUBO  Hidenaga TAKAHASHI  Kiyotaka OGAWA  Yukio OTOBE  

     
    PAPER-Multimedia System LSIs

      Vol:
    E77-C No:12
      Page(s):
    1859-1864

    Development of low power MUSE (Multiple Sub-Nyquist Sampling Encoding) chip set through reduction in operating voltage (from 5 V to 3.7 V) is described. This leads to great cost reduction since the chips could be mounted on low cost plastic packages and the necessity for cooling fans to dissipate heat was obviated. To maintain compatibility with standard 5 V analog and digital peripherals such as 4 Mbit DRAMs and an A/D converter, a special voltage-level converter was also developed.

  • Stuff Synchronization Circuit Design for HDTV Transmission on SDH Network

    Yasuyuki OKUMURA  Ryozo KISHIMOTO  

     
    PAPER-Communication Device and Circuit

      Vol:
    E77-B No:12
      Page(s):
    1614-1620

    This paper describes a design method of stuff synchronization circuit for High-definition Television (HDTV) transmission to reduce stuff jitter, one of the greatest problems in video transmission through plural Synchronous Digital Hierarchy (SDH) networks operating with different frequency sources. First, we determine the quantity of stuff jitter in SDH networks using the pointer mechanism and Administration Unit (AU) pointer bytes. From the results of a subjective test conducted for HDTV, we show that the minimum noticeable jitter is 3.6 nsec in using a color-bar pattern as a test image and a sinusoidal wave as a jitter signal. These results are used to describe the effect of stuff jitter on picture quality. We then introduce a distributed destuffing method at the receiving end, and show that jitter can be reduced by about 32dB in a 622Mbps rate system. Based on these results, we finally show that the cut-off frequency of the clock recovery PLL for distributed destuffing is more than 10 times higher than that required by conventional destuffing. This reduces the pull-in time by more than 99.9%.

  • A Study on Power Assignment of Hierarchical Modulation Schemes for Digital Broadcasting

    Masakazu MORIMOTO  Hiroshi HARADA  Minoru OKADA  Shozo KOMAKI  

     
    PAPER

      Vol:
    E77-B No:12
      Page(s):
    1495-1500

    In the future satellite broadcasting system in 21GHz band, the rainfall attenuation is a most significant problem. To solve this problem, the hierarchical transmission systems have been studied. This paper analyzes the performance of the hierarchical modulation scheme from the view point of power assignment in the presence of the rainfall attenuation. This paper shows an optimum power assignment ratio to maximize the spectral efficiency and the signal-to-noise ratio of received image, and these optimum ratio is varied with the measure of system performance.

  • Design of Subband Codec for HDTV Transmission

    Kazunari IRIE  Yasuyuki OKUMURA  Naoya SAKURAI  Ryozo KISHIMOTO  

     
    PAPER-Communication Terminal and Equipment

      Vol:
    E76-B No:11
      Page(s):
    1416-1423

    High Definition Television (HDTV) is likely to be one of the major services in the Broadband Integrated Services Digital Network (B-ISDN). The transmission of HDTV signals on digital networks requires the adoption of sophisticated compression techniques to limit the bit-rate requirements and to provide high-quality and cost-effective network services. A flexible coding scheme that supports various bit-rates is needed to support the various services expected which will have different requirements. This paper describes the design of an HDTV codec based on a subband DCT coding algorithm that can encode original 1.2 Gb/s HDTV signals to less than 50Mb/s. A configuration that efficiently bridges HDTV and standard TV signals is also proposed. Computer simulation results show that the degradation caused by the bridging function is insignificant. In the coder, first stage quadrature mirror filters (QMFs) decompose the input signal into two bands in the horizontal direction, while the second stage filters decompose the two bands into four bands in the vertical direction. Adaptive DCT (Discrete Cosine Transform) is adopted for horizontal-low and vertical-low (LL) signal coding. High-band signals are coded by adaptive DPCM and PCM. To maximize bit-rate reduction efficiency, DCT coding is adaptively applied to either the intra-field signals, the inter-field signals, or the motion compensated inter-frame signals. Bi-directional inter-frame prediction is applied to the adaptive DCT coding to improve coding performance at low bit rates. The same prediction mode as for LL signal is applied to adaptive DPCM coding of LH and HL signals. Compatibility is realized by a configuration in which both the TV signal components and the residual signal, derived by subtracting the TV signal from the LL signal, are encoded.

  • Subband DCT Codec Applied to HDTV Transmission System

    Naoya SAKURAI  Kazunari IRIE  Ryozo KISHIMOTO  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E76-B No:4
      Page(s):
    431-437

    The transmission of HDTV signals on digital networks requires adoption of sophisticated compression techniques to limit the bit-rate requirements and to provide a high-quality and reliable services to customers. This paper describes system design and transmission characteristics of an adaptive subband DCT codec that can encode original 1.2Gb/s HDTV signals at 156Mb/s. The performance of the codec was evaluated using motion picture signals. The characteristics obtained with the codec was found to maintain good picture quality.

  • High-Definition Television (HDTV) Solid State Image Sensors

    Sohei MANABE  Nozomu HARADA  

     
    INVITED PAPER-LSI Technology for Opto-Electronics

      Vol:
    E76-C No:1
      Page(s):
    78-85

    High-Definition Television (HDTV) 2 million pixel solid state image sensors with high performances are realized, applicable for 1 inch optical format. Key technical aspects of HDTV image sensors are suppression of smear level by maintaining large optical aperture and high readout signal rate by introducing a dual channel horizontal register. From such a perspective, new HDTV image sensors such as Stack CCD, Frame-Interline Transfer (FIT) CCD and Charge Modulation Device (CMD) are developed.

  • HDTV Communication and Coding in Europe

    Ludwig STENGER  Hans Georg MUSMANN  Ken D. McCANN  

     
    INVITED PAPER

      Vol:
    E75-B No:5
      Page(s):
    319-326

    The present status of HDTV in Europe and the concept of an evolutionary introduction of HDTV broadcasting is described. Corresponding HDTV standards and studio technologies are outlined. Analog transmission techniques like HD-MAC as well as coding techniques for digital transmission are presented. Also some informations about investigations for non-broadcast applications are given.

21-29hit(29hit)

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