Since the structured quasi-cyclic low-density parity-check (QC-LDPC) codes for most modern wireless communication systems include multiple code rates, various block lengths, and the corresponding different sizes of submatrices in parity check matrix (PCM), the reconfigurable LDPC decoder is desirable and the permutation network is needed to accommodate any input number (IN) and shift number (SN) for cyclic shift. In this paper, we propose a novel permutation network architecture for the reconfigurable QC-LDPC decoders based on Banyan network. We prove that Banyan network has the nonblocking property for cyclic shift when the IN is power of 2, and give the control signal generating algorithm. Through introducing the bypass network, we put forward the nonblocking scheme for any IN and SN. In addition, we present the hardware design of the control signal generator, which can greatly reduce the hardware complexity and latency. The synthesis results using the TSMC 0.18 µm library demonstrate that the proposed permutation network can be implemented with the area of 0.546 mm2 and the frequency of 292 MHz.

Vertically stacked optical banyan (VSOB) is an attractive architecture for constructing banyan-based optical switches. Blocking behaviors analysis is an effective approach to studying network performance and finding a graceful compromise among hardware costs, blocking probability and crosstalk tolerance; however, little has been done on analyzing the blocking behavior of VSOB networks under crosstalk constraint which adds a new dimension to the switching performance. In this paper, we study the overall blocking behavior of a VSOB network under various degree of crosstalk, where an upper bound on the blocking probability of the network is developed. The upper bound depicts accurately the overall blocking behavior of a VSOB network as verified by extensive simulation results and it agrees with the strictly nonblocking condition of the network. The derived upper bound is significant because it reveals the inherent relationship between blocking probability and network hardware cost, by which a desirable tradeoff can be made between them under various degree of crosstalk constraint. Also, the upper bound shows how crosstalk adds a new dimension to the theory of switching systems.

A combination of horizontal expansion and vertical stacking of optical Banyan (HVOB) is the general architecture for building Banyan-based optical cross-connects (OXCs), and the intrinsic crosstalk problem of optical signals is a major constraint in designing OXCs. In this paper, we analyze the blocking behavior of HVOB networks and develop the lower bound on blocking probability of a HVOB network that is free of first-order crosstalk in switching elements. The proposed lower-bound is significant because it provides network designers an effective tool to estimate the minimum blocking probability they can expect from a HVOB architecture regardless what kind of routing strategy to be adopted. Our lower bound can accurately depict the overall blocking behavior in terms of the minimum blocking probability in a HVOB network, as verified by extensive simulation based on a network simulator with both random routing and packing routing strategies. Surprisingly, the simulated and theoretical results show that our lower bound can be used to efficiently estimate the blocking probability of HVOB networks applying packing strategy. Thus, our analytical model can guide network designers to find the tradeoff among the number of planes (stacked copies), the number of SEs, the number of stages and blocking probability in a HVOB network applying packing strategy.

Vertical stacking is a novel technique for creating nonblocking (crosstalk-free) optical multistage interconnection networks (MINs). In this paper, we propose a new class of optical MINs, the vertically stacked Benes (VSB) networks, for crosstalk-free realization of permutations in a single pass. An NN VSB network requires at most O(Nlog N) switching elements, which is the same as the Benes network, and much lower overall hardware cost than that of the existing optical MINs built on the combination of horizontal expansion and vertical stacking of banyan networks, to provide the same crosstalk-free permutation capability. Furthermore, the structure of VSB networks provides a more flexible way for constructing optical MINs because they give more choices in terms of the number of stages used in an optical MIN. We also present efficient algorithms to realize crosstalk-free permutations in an NN VSB network in time O(Nlog N), which matches the same bound as required by the reported schemes.

Vertical stacking is a novel technique for building switching networks, and packing multiple compatible connections together is an effective strategy to reduce network hardware cost. In this paper, we study the crosstalk-free permutation capability of an optical switching network built on the vertical stacking of optical banyan networks to which packing strategy is applied. We first look into the nonblocking condition of this optical switching network. We then study the crosstalk-free permutation in this network by decomposing a permutation evenly into multiple crosstalk-free partial permutations (CFPPs) and realizing each CFPP in a stacked plane of the network such that a crosstalk-free permutation can be performed in a single pass. We present a rigorous proof of CFPP decomposability of a permutation and also a complete algorithm for CFPP decomposition. The possibility of a tradeoff between the number of passes and the number of planes required for realizing a crosstalk-free permutation in this network is also explored in this paper.

Crosstalk in optical switch is an intrinsic drawback of optical networks, and avoiding crosstalk is important for making optical network work properly. Horizontal expansion and vertical stacking are two basic techniques for creating nonblocking multistage interconnection networks (MINs). Rearrangeable (nonblocking) optical MINs are feasible since they have lower complexity than their strictly nonblocking counterparts. In this paper, we study the crosstalk-free permutations in rearrangeable optical MINs built on a combination of horizontal expansion and vertical stacking of banyan networks, and provide a scheme for realizing crosstalk-free permutations in this kind of optical MINs. The basic idea of this scheme is to first decompose a permutation into multiple partial permutations by using Euler Split technique, then route and realize each of these partial permutations crosstalk-free in one plane (stacked copy) of a MIN based on both the Euler Split technique and self-routing property of a banyan network. The tradeoff between the overall time complexity and hardware cost of this class of MINs is also explored in this paper.

The banyan network is a popular and basic structure of the multi-stage ATM switches. This paper presents a novel approach to resolve the internal blocking of the banyan network by using a Non-Blocking Permutation Generator (NBPG). The NBPG performs two functions, i.e., the first is to extract the conflict cells from the incoming cells and the second is to re-assign new input port addresses to the conflict cells. As a result, NBPG generates non-blocking I/O permutations. To estimate the performance of the NBPG, we provide the results of several simulations.

Banyan networks and their improved switches such as 2-dilated banyan networks are usually constructed by a self-routing mechanism, and provide a high multiplexing transmission capacity to ATM networks. Due to cell blocking in the switching elements in these banyan networks, however, cell loss is occurred and then the throughput of each network is decreased. To improve this problem, we have introduced bypasses to the original and the 2-dilated banyan networks. This paper focuses on the position of the bypasses in these banyan networks and proposes the one-bypass-connection methods in order to minimize cell transfer delay caused by the bypasses. We also analyze output rate of each network and show that the bypass method gives network designers flexible selections for network performance and transfer delay.

Packet contention is one of the fundamental problems that must be overcome in designing packet switches. In banyan network, which has multistage interconnection structure of many small switch elements, we must be concerned with output port conflicts and internal collisions. Dilated banyan network which provides multiple path for internal link can reduce packet loss due to internal collisions in loss system. However, under hot-spot traffic higher packet loss probability is measured at the hot-spot port and the ports close to the hot-spot as coefficient h increases due to the heavy traffic to hot-spot port. In order to moderate the packet loss probability at the hot-spot port we propose the method to disperse the packets which concentrate on the hot-spot route by altering address field of a half of incoming packets. These packets are switched along detour routes. Thus, the traffic concentration toward hot-spot is mitigated and the packet loss probability at the hot-spot port is moderated.

The optimistic analytical results for performance analysis of buffered banyan networks are mainly due to certain independence assumptions used for simplifying analysis. To capture more effects of cell correlation, a refined analytical model for both single-buffered and multiple buffered banyan networks is proposed in this paper. When cell output contention occurs at a 2 2 switch element, two contention resolution schemes are used. One is based on randomly choosing the winning cell and another is to give priority to the cell which has been delayed in the current buffer for at least one stage cycle. The switch throughput, cell transfer delay and cell delay deviation for single-buffered banyan networks with and without using priority scheme are derived. Then the model is generalized to multiple buffered banyan networks where analytical expressions for throughput and delay are obtained. We show that using the priority scheme the cell delay deviation is reduced and the influence on throughput performance is insignificant. The results obtained from our analytical model are compared with the simulations and good agreement is observed. Comparisons with some proposed analytical models in the literature reveal that our model is more accurate and powerful in predicting the performance of buffered banyan networks.

Multicasting is an important feature for any switching network being intended to support broadband integrated services digital networks (B-ISDN). This paper proposes an improved multicast packet switch based on Lee's nonblocking copy network. The improved design retains the desirable features of Lee's network including its nonblocking property while adopting techniques to overcome the various limitations mentioned in various literature. The proposed network architecture utilizes d-dilated banyan networks to increase the amount of cells that can be replicated within the copy network. Cell splitting is used to optimize the utilization of the network's available bandwidth. Furthermore, the proposed architecture allows for the modular expansion in capacity to accomodate changing traffic patterns. The modular design of the proposed switch likewise offers easy handling and replacement of faulty modules.

In this paper, we propose a new switching network architecture with output queueing, The proposed switch, FBSF (FAB Banyan Switching Fabrics) can deliver up to 2r packets simultaneously destined for the same outlet in a single time slot. The switch fabrics consist of Batcher sorter, a radix-r double shuffle network r-packet distributors, two FAB networks, and output buffer modules. The performance of the switch fabric is evaluated by measures of throughput, average queue length, average waiting time, and packet loss rate. Numerical and simulation results indicate that the switch exhibits very good delay-throughput performance over a wide range of input traffic.

Banyan networks are used in multiprocessor computer applications for an ATM switching. In this paper, we study the continuous blocking of the first n-stage which makes the performance of the banyan networks decrease. We use the 2-dilated banyan networks into the banyan networks to remove the continuous blocking of the first n-stage. We call the new networks as the hybrid dilated banyan networks. We explain how to analyze the throughput of this networks at each stage. Based on the analysis of input rate and output rate at each stage, we can design the hybrid dilated banyan networks with the desirable output rate. The result of analysis shows the hybrid dilated banyan networks have higher performance and feasibility than the banyan networks.

The modular and growable photonic ATM switch architecture described in this paper uses both time-division and wavelength-division multiplexing technologies, so the switch capacity can be expanded in both the time and frequency domains. It uses a new implementation of output buffering scheme that overcomes the bottleneck in receiving and storing concurrent ultra fast optical cells. The capacity in one stage of a switch with this architecture can be increased from 32 gigabits per second to several terabits per second in a modular fashion. The proposed switch structure with output channel grouping can greatly reduce the amount of hardware and still guarantee the cell sequence.

ATM cross-connect systems, which will be used for provisioning virtual paths (i.e. logical direct connections between exchanges) in future broadband transport networks, simplify network configuration and yield increased routing and capacity allocating flexibility. This paper describes the design of a large capacity ATM cross-connect system that has a multi-stage network structure which requires only one type of switch module. The capacity of the proposed system can be easily increased without service interruptions. To realize cell sequence integrity, a time stamp is added to the self-routing tag. Required time stamp length and efficient module size are discussed.