A frequency selection algorithm leveraging the capability of a handset to autonomously select idle channels of a public communication system for use in a private communication system was previously proposed, and its effectiveness was verified through experiments conducted in a metropolitan area. This paper describes the results of an experiment verifying the algorithm's effectiveness in rural areas with relatively low public communication system traffic.

A CMOS voltage reference circuit based on a voltage at the zero-temperature-coefficient point of drain current is proposed. The output voltage of the proposed circuit is variable by a substrate bias. The proposed circuit is simulated with a standard 0.8-µm CMOS technology. The output voltage keeps 800 mV, and its fractional temperature coefficient is 9.94 ppm/ over the temperature range from -100 to 150 at a zero-bias. The PSRR of the output voltage is -42.55 dB at 100 Hz. The minimum power-supply voltage is 2.1 V. The output voltage can be shifted down to 670 mV while maintaining its temperature-insensitivity.

A miniaturized rectangular resonator made of a novel anisotropic artificial dielectric material is investigated which has advantages of small size and big separation of the higher-modes. To obtain a property of anisotropic permittivity, artificial dielectric material is fabricated by lamination of rectangular metal strips etched on a printed circuit board. Artificial dielectric rectangular resonators are designed to excite TE10δ mode selectively, aligning the rectangular metal patterns along the direction of the mode electric field line. The resonant frequencies and coupling coefficient of artificial dielectric rectangular resonators encapsulated in a metal waveguide are analyzed theoretically, and compared with the experimental result. As a microwave application, a high selectivity TE10δ mode bandpass filter (BPF) using two artificial dielectric rectangular resonators is demonstrated. A two-stage BPF with the center frequency of 1.718 GHz, bandwidth of 78 MHz, and insertion loss of 1.3 dB is successfully realized in a rectangular waveguide.

The effects of air-intake format of forced-air-cooled equipment on the efficiency of air conditioning systems are studied. A modern data center features a large number of information-processing devices to provide telecommunication services. These devices generate considerable heat, and the equipment that houses these devices often employs "forced air cooling" in which a cooling effect is achieved by sucking in large amounts of room air. An air conditioning system used for a machine room filled with such equipment therefore requires high fan driving power resulting in significantly low air conditioning efficiency. In this study, we first performed mockup-based experiments to obtain a quantitative understanding of how different air-intake formats for equipment affect the temperature at various room locations such as equipment intake. We then created a model for predicting the temperature at various locations, and on the basis of this model, we analyzed the factors affecting intake temperature and examined how intake temperature affects air conditioning efficiency. It was found that placing air inlets in the lower 1/3 portion of forced-air-cooled equipment could prevent the equipment from reabsorbing the hot air that it blows out and therefore improve air conditioning efficiency.

The maximum a posteriori (MAP) algorithm is the optimum solution for decoding concatenated codes, such as turbo codes. Since the MAP algorithm is computationally complex, more efficient algorithms, such as the Max-Log-MAP algorithm and the soft-output Viterbi algorithm (SOVA), can be used as suboptimum solutions. Especially, the Max-Log-MAP algorithm is widely used, due to its near-optimum performance and lower complexity compared with the MAP algorithm. In this paper, we propose an efficient algorithm for decoding concatenated codes by modifying the Max-Log-MAP algorithm. The efficient implementation of the backward recursion and the log-likelihood ratio (LLR) update in the proposed algorithm improves its computational efficiency. Memory is utilized more efficiently if the sliding window algorithm is adopted. Computer simulations and analysis show that the proposed algorithm requires a considerably lower number of computations compared with the Max-Log-MAP algorithm, while providing the same overall performance.

This paper proposes a method to detect buildings and houses whose walls are not parallel to Synthetic Aperture Radar (SAR) flight path. Experimental observations show that it is difficult to detect these targets because of small backscattering characteristics. The detection method is based on the correlation coefficient in the circular polarization basis, taking full advantage of Polarimetric SAR (POLSAR) data. Since the correlation coefficient is real-valued for natural distributed targets with reflection symmetry and for non-natural targets orthogonal to illumination direction, and it becomes a complex number for non-natural targets aligned not orthogonal to radar Line-Of-Sight (LOS), the value seems to be an effective index for detection of obliquely aligned non-natural targets. The detection results are shown using the X-band Polarimetric and Interferometric SAR (Pi-SAR) single-path data set in conjunction with other polarimetric indices.

This paper proposes a new configuration of the Doherty amplifier by introducing digital signal processing that realizes a high efficiency over a wide range of output power. The configuration includes two branches; one branch has a class AB amplifier as the carrier amplifier and the other has two class B amplifiers in cascade as the peak amplifier. Each branch is directly controlled by the digital signal processing unit. The unit controls input power allocation to each branch by a method derived from equations characterizing the carrier and the peak constituent amplifiers. The method includes the compensation of the amplifier for degradation due to nonlinearities. The output power of each constituent amplifier is adjusted by drain DC biases. Calculated characteristics agree well with those obtained by the measurement of a fabricated proposed amplifier, whose efficiency is higher than that of the conventional class AB power amplifiers. Furthermore, a simulation for the OFDM signal specified by the radio LAN shows that the amplifier has sufficient linearity, and that the efficiency exceeds 20% at the output of 20 dBm.

This paper presents a new high-speed and area-efficient dual-rail PLA. The proposed circuit includes three schemes: 1) a divided column scheme (DCS), 2) a programmable sense-amplifier activation scheme (PSAS), and 3) an interdigitated column scheme (ICS). In the DCS, a column circuit of a PLA is divided and each circuit operates in parallel. This enhances the performance of the PLA, and this scheme becomes more effective as input data bandwidth increases. The PSAS is used to generate an activation pulse for sense amplifiers in the PLA. In this scheme, the proposed delay generators enable to minimize a timing margin depending on process variations and operating conditions. The ICS is used to enhance the area-efficiency of the PLA, where a method of physical compaction is employed. This scheme is effective for circuits which have the regularity in logic function such as arithmetic circuits. As applications of the proposed PLA, a comparator, a priority encoder, and an incrementor for 128-bit data processing were designed. The proposed circuit design schemes achieved a 22.2% delay reduction and a 37.5% area reduction on average over the conventional high-speed and low-power PLA in a 0.13-µm CMOS technology with a supply voltage of 1.2 V.

Recently, the small-world network model has been popular to describe a wide range of networks such as human social relations and networks formed by biological entities. The network model achieves a small diameter with relatively few links as measured by the ratio of clustering coefficient and the number of links. It is quite natural to consider email communication similar to social network patterns. Quite surprisingly, we find from our empirical study that local email networks follow a different type of network model that falls into the category of scale-free network. We propose new network models to describe such communication structure.

In this paper, a coefficient-parameter reduction method is proposed for invertible deinterlacing with variable coefficients. Invertible deinterlacing, which the authors have developed before, can be used as a preprocess of frame-based motion picture codec, such as Motion-JPEG2000 (MJP2), for interlaced videos. When the conventional field-interleaving is used instead, comb-tooth artifacts appear around edges of moving objects. On the other hand, the invertible deinterlacing technique allows us to suppress the comb-tooth artifacts and also to recover an original picture on demand. As previous works, the authors have developed a variable coefficient scheme with a motion detection filter, which realizes adaptability to local characteristics of given pictures. When applying this deinterlacing technique to an image codec, it is required to send coefficient parameters to receivers for original picture recovery. This work proposes a parameter decimation technique and shows that this reduction approach can be achieved without significant loss of comb-tooth suppression capability and improves the quality at high bit-rate decoding.

In this paper, we propose a simple and accurate transfer function model of the power amplifiers for mobile communications. Detail analysis yields a generalized model for AM/AM characteristics in classes AB, B, and C. The analysis includes the effect of drain current variation with input level variation. This model introduces a loadline variation ratio to indicate the change of drain current and to represent the operation classes in a small signal region. Further discussion leads to simplified approximate equations for the AM/AM characteristics, and the estimation procedures for the simplified model parameters. Using the derived procedures, an efficient power amplifier employing pseudomorphic high electron mobility transistor (PHEMT) is fabricated for the 2 GHz band. Finally, the various characteristics given by the model, simulator and measurements are compared and found to agree well in the range of 20 dB below the saturated output level. The model is very effective for characterizing the power amplifiers that are used in linear compensation techniques such as predistortion methods, due to its severe nonlinearity of AM/AM and AM/PM characteristics.

A novel method for measuring microwave reflection coefficients without the open and load standards is proposed. In this method, a single probe is inserted into an air line and the output wave is detected by a vector detector. Offset shorts are used for the calibration. The measurement system is constructed using 7 mm coaxial line and APC7 connectors. The result of the measurement in the frequency range 1-9 GHz shows the possibility of the proposed method. All the major systematic errors can be estimated from the data that is easily obtainable.

The rapid spread of cellular phones in recent years has facilitated not only voice communication but also Internet access via the cellular phone system, and in addition, subscriber demand has led to a diversification in the services provided. One service in high demand is the seamless use of cellular phones in both public and private wireless network areas. In the data world, there is already such an application in the form of public and private use of wireless LAN. However, an increase in the number of users would require the realization of low-cost, easy-to-install very small base stations (VSBS) that use the frequency band efficiently in order to allow private use of ordinary cellular phones. To bring such VSBS into effect, a technology that autonomously selects frequencies which do not interfere with the public communication system from out of the publicly used frequency band is essential for turning such VSBS into reality. This paper proposes a frequency selection algorithm that actively uses cellular phone features such as frequency selection and received signal level measurement, and discusses the results of verification experiments.

This paper describes an efficient method for the macromodel generation of hybrid systems which are composed of electromagnetic systems and lumped RLC circuits. In our method, electromagnetic systems are formulated as finite-difference frequency-domain (FDFD) equations, and RLC circuits are formulated as nodal equations. Therefore, unlike the partial-element equivalent-circuit (PEEC) method, the technique presented here does not need any 3-dimensional capacitance and inductance parameter extractions to model interconnects, LSI packages and printed circuit boards. Also the lumped RLC elements can be easily included in the hybrid system of equations, thus it is convenient to model some passive components, such as bypass capacitors. The model order reduction technique is utilized in order to construct macromodels from hybrid system of equations. The accuracy of the proposed method is substantiated with some numerical examples.

Temperature dependence of drain current is analyzed in detail in terms of mobility and threshold voltage. From the analyses, it is proved that a point exists that the drain current is fixed without depending on temperature when the MOSFET operates in strong inversion. Applying this characteristic, a CMOS temperature-voltage converter operating in strong inversion with high linearity is proposed. SPICE simulation and experimental results are shown, and the corresponding performances are discussed.

This paper describes an area-efficient dual-rail array logic architecture, a logic-cell-embedded PLA (LCPLA), which has 2-input logic cells in the structure. The 2-input logic cells composed of pass-transistors can realize any 2-input Boolean function and are embedded in a dual-rail PLA. The logic cells can be designed by connecting some local wires and do not require additional transistors over logic cells of the conventional dual-rail PLA. By using the logic cells, some classes of logic functions can be implemented efficiently, so that high-speed and low-power operations are also achieved. The advantages over the conventional PLAs and standard-cell-based designs were demonstrated by using benchmark circuits, and the LCPLA is shown to be effective to reduce the number of product terms. In a structure with a 64-bit input and a 1-bit output including 220 product terms, the LCPLA achieved an area reduction by 35% compared to the conventional high-speed dual-rail PLA, and the power-delay product was reduced by 74% and 46% compared to the conventional high-speed single-rail PLA and the conventional high-speed dual-rail PLA, respectively. A test chip of this configuration was fabricated using a 0.35-µm, 3-metal-layer CMOS technology, and was verified with a functional test using a logic tester and an electron-beam tester at frequencies of up to 100 MHz with a supply voltage of 3.3 V.

Development of non-invasive techniques to measure blood sugar level is strongly required. The application of millimeter waves has a great potentiality to realize the measuring technique. Nevertheless, the practical method of the technique is not yet reported. In this paper, a new technique is proposed to measure blood sugar level using millimeter waves. The technique proposed here is very rapid and safety way to obtain blood sugar level.

This paper presents a variable pipeline depth processor, which can dynamically adjust its pipeline depth and operating voltage at run-time, we call dynamic pipeline and voltage scaling (DPVS), depending on the workload characteristics under timing constraints. The advantage of adjusting pipeline depth is that it can eliminate the useless energy dissipation of the additional stalls, or NOPs and wrong-path instructions which would increase as the pipeline depth grow deeper in excess of the inherent parallelism. Although dynamic voltage scaling (DVS) is a very effective technique in itself for reducing energy dissipation, lowering supply voltage also causes performance degradation. By combining with dynamic pipeline scaling (DPS), it would be possible to retain performance at required level while reducing energy dissipation much further. Experimental results show the effectiveness of our DPVS approach for a variety of benchmarks, reducing total energy dissipation by up to 64.90% with an average of 27.42% without any effect on performance, compared with a processor using only DVS.

In this paper, a non-adaptive optimal transform (NAOT) coding system is proposed. Note that the energy-invariant property in an orthogonal transformation and that the mean squared error (MSE) of a reconstructed image is proportional to the total energy of transform coefficients discarded in the coding process. The NAOT coding system is developed and proved optimal in the sense of minimum average energy loss. Basically, the proposed coding system consists of the following steps. First, obtain the average energy image block from transform image blocks. Second, sort the average energy image block in the descending order by energy where the sorted indices are recorded. Third, specify the number of coefficients, M, to be retained in the coding process. Fourth, the first M sorted indices form a set denoted as SM through which the problem of optimal feature selection in transform coding is solved. Fifth, find a fixed mask AM from set SM which is then used to select M significant transform coefficients in image blocks. Finally, the M selected coefficients are quantized and coded by the order as in SM. To verify the NAOT coding system, simulations are performed on several examples. In the simulation, the optimality and the optimal feature selection in the NAOT coding system are justified. Also, the effectiveness of the proposed SM-based selection approach is compared with the zigzag scan used in the JPEG. For fair comparison, the JPEG is modified to code only M transform coefficients. Simulation results indicate that the performance of SM-based selection approach is superior or identical to the zigzag scan in terms of PSNR. Finally, the performance comparison between the NAOT coding system and the JPEG is made. It suggests that the proposed NAOT coding system is able to trade very little PSNR for significant bit rate reduction when compared with the JPEG. Or it can be said that the JPEG wastes much bit rate to improve very little PSNR on the reconstructed image, when compared with the NAOT coding system.

In this paper, a lifting implementation of variable-coefficient invertible deinterlacer with embedded motion detector is proposed. As previous works, the authors have developed invertible deinterlacing that suppresses comb-tooth artifacts caused by field interleaving for interlaced scanning video, which affect the quality of intraframe-based codec such as Motion-JPEG2000. To improve the local adaptability for given pictures, its variable-coefficient processing with motion detection has also been proposed so that filters can be changed according to local properties of motion pictures, while maintaining the invertibility. In this paper, it is shown that the variable-coefficient invertible deinterlacing can be realized by a lifting-based simple hardware architecture, and motion detector can also be embedded. Both of the motion detection and deinterlacing filters are shared by a special choice of their coefficients, and by adaptive selection of deinterlacing filters. The significance of our proposed architecture is verified by showing synthesis results from the VHDL models. The proposed implementation with embedded motion detector achieves about 28% reduction of the gate count compared with the corresponding separate implementation.