Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

In order to provide an efficient test method for PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. The new BIST uses the change of phase differences generated by selectively alternating the feedback frequency. It provides an efficient structural test, reduces an area overhead and improves the test accessibility.