A test structure to separately measure sheet resistances of highly-doped-drain (HDD) and lightly-doped-drain (LDD) in LDD-type CMOSFETs with various gate spaces S having sub-100 nm sidewalls was proposed. From the reciprocal of source/drain-resistance R-1 versus S characteristics, the sheet resistance ρH of the high-conductive-region (HCR) corresponding to HDD and the approximate width WLC of the low-conductive-region (LCR) corresponding to LDD could be estimated. Both of ρH and WLC for p- and n-MOS devices were scarcely dependent on the gate voltage. The sidewall-width difference of 40 nm could be sufficiently detected by using the test structure with the S pitch of about 60 nm. The R-1 versus S characteristics showed the unstable resistance variations in the narrow S region less than 0.3 µm, which corresponded to the minimum S for the process used for the test device fabrication and suggested that various micro-loading effects seriously affected on the characteristics.

The main factor determining for both friction and contact resistance is the true contact area in the contact interface. Contact resistance depends on the size of the true contact area and contaminant films interposed between the contact areas of the interface. Moreover, friction force also depends on the true contact area. In particular, the formation of metallic junctions in the true contact area strongly effects the friction force. Therefore, since both electrical contact and friction force are related to the size of the true contact area, the contact resistance and friction force are considered to be interrelated through true contact areas. For electromechanical devices with sliding contacts such as connector and sliding switches, the contact resistance and friction are important characteristics. In order to obtain low contact resistance, contact load should be higher, but the friction force increases. These are opposite-side problems. In this study, as the contact resistance and friction occur in the same true contact area, the relationship between the contact resistance and friction was expressed in an equation. Moreover, this relationship was examined experimentally on a variety of contact surfaces under different surface conditions.

Experimental investigations on detection of terahertz radiation are presented. We used plasma wave instability phenomenon in nanometer Silicon field effect transistor. A 30 nm gate length transistor was illuminated by THz radiation at room temperature. We observe a maximum signal near to the threshold voltage. This result clearly demonstrates the possibility of plasma wave THz operation of these nanometer scale devices. The response was attributed to a non resonant detection. We also demonstrate the possibility to observe a resonant detection on the same devices.

A novel resonant tunneling diode (RTD) oscillator is proposed, which overcomes the problems of the conventional RTD oscillators, such as the low-frequency spurious oscillation and the bias instability. Our proposal consists of two RTDs connected serially, and the resonator connected to the node between two RTDs. This circuit separates the oscillation node from the bias nodes, and suppresses the above mentioned problems. This relaxes the severe restriction on the RTD area, and makes it possible to supply higher power to a load. Circuit simulation shows that with this circuit more than 2 mW power can be supplied to the 50 Ω resistive load at 100 GHz using RTDs having 105 A/cm2-peak current density and 20 µm2-area. It also shows that the dc-to-RF conversion efficiency is as good as that of conventional ones. Furthermore, we have studied the extension of this oscillator having 4 RTDs connected serially. Circuit simulations revealed that using this circuit the power can be doubled with a good conversion efficiency.

The correlation between ohmic contact resistivity (ρc) and transconductance (gm) in AlGaN/GaN high-electron-mobility transistors (HEMTs) was investigated. To characterize ρc precisely, we fabricated a circular transmission line model (c-TLM) pattern adjoined to a field-effect transistor (FET) pattern on an HEMT. By measuring ohmic contact resistance and sheet resistance using the adjoined c-TLM, intrinsic transconductance (gm0), which is not influenced by the source resistance, can be estimated. The gm0 thus obtained is between 179 and 206 mS/mm. Then, it became possible to calculate the correlation between gm and (ρc. We found that ρc should be below 10-5 Ωcm2 for the improvement of gm in AlGaN/GaN HEMT when Rsh 400 Ω/.

We present room temperature current voltage characteristics from SiGe interband tunneling diodes epitaxially grown on highly resistive Si(001) substrates. In this case, a maximum peak to valley current ratio (PVCR) of 5.65 was obtained. The possible integration of a SiGe tunnel diode with a strained Si transistor lead us to investigate the growth of SiGe interband tunneling diodes on Si0.7Ge0.3 virtual substrates. A careful optimization of the layer structure leads to a maximum PVCR of 1.36 at room temperature. The latter value can be further increased to 2.26 at 3.7 K. Our results demonstrate that high quality SiGe interband tunneling diodes can be realized, which is of great interest for future memory and high speed applications.

A system was developed to measure the microwave power dependence of the surface resistance superconductor films. The system uses a dielectric resonator method combined with a circle fit technique and a two-mode technique to measure the microwave surface resistance of superconductor films. For validation, this system was used to measure such surface resistance for superconductor films with different surface morphologies. Significant difference in microwave power dependence of surface resistance was observed. This measurement system proved suitable for evaluating superconducting films for passive microwave devices, including high power devices such as transmitting filters.

Double-sided YBa2Cu3O7 (YBCO) films were successfully prepared on 50-mm-diameter CeO2-buffered sapphire substrates by metalorganic deposition (MOD) process using an acetylacetonate coating solution. Mapping analysis of superconducting current densities (Jc) at 77.3 K revealed that Jc values of the double-sided films indicated in excess of 2 MA/cm2 in the center parts with a small decrease of Jc at the outer side of the specimens. The Jc values of one side (A) are higher than those of the other side (B). Microwave surface resistance (Rs) of sides A and B of the film exhibited 0.57 and 0.60 mΩ, respectively, at 70 K (12 GHz). The difference in the Rs values should be attributed to the slight difference in the Jc values, which arose from the surface morphology of the CeO2 buffer layer and heat treatment conditions during the firing process in MOD.

A novel low-voltage low-distortion analog sampling switch is proposed in this letter. A "source tracker" techniuqe is used to distinguish the real source terminal of the sampling switch. The turn-on resistance of the sampling switch is kept exactly constant. The modified switch makes the rail-to-rail input signal swing possible for low voltage. TSMC 0.18 µm standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.

A new channel estimator that does not require a separate frequency offset estimator is proposed. The new algorithm has low complexity and low latency compared to the well-known weighted multi-slot averaging algorithm. The simulation results demonstrate the improved resistance to high Doppler frequency and high frequency offset.

This paper proposes a new non-destructive methodology to estimate physical parameters for LSIs. In order to resolve the estimation accuracy degradation issue for low-k dielectric films, we employ a parallel-plate capacitance measurement and a wire resistance measurement in our non-destructive method. Due to (1) the response surface functions corresponding to the parallel-plate capacitance measurement and the wire resistance measurement and (2) the searching of the physical parameter values using our cost function and simulated annealing, the proposed method attains higher precision than that of the existing method. We demonstrate the effectiveness of our method by application to our 90 nm SoC process using low-k materials.

Self-connection can enlarge the memory capacity of an associative memory based on the neural network. However, the basin size of the embedded memory state shrinks. The problem of basin size is related to undesirable stable states which are spurious. If we can destabilize these spurious states, we expect to improve the basin size. The inverse function delayed (ID) model, which includes the Bonhoeffer-van der Pol (BVP) model, has negative resistance in its dynamics. The negative resistance of the ID model can destabilize the equilibrium states on certain regions of the conventional neural network. Therefore, the associative memory based on the ID model, which has self-connection in order to enlarge the memory capacity, has the possibility to improve the basin size of the network. In this paper, we examine the fundamental characteristics of an associative memory based on the ID model by numerical simulation and show the improvement of performance compared with the conventional neural network.

The author prepared new composition of Cu-Sn based composite materials containing lamellar solid lubricants, and measured their performance with focus on contact resistance and the coefficient of friction using a low-speed tribo-meter. Among three kinds of composite materials, the composite material containing 26wt.% of total solid lubricants was lower in both of contact resistance and the coefficient of friction and showed stable characteristics compared with those containing 25wt.% and 35wt.% respectively. The author analyzed the characteristics of these materials using several techniques including BSE image, element analysis through EPMA, and mapping analysis, and examined why the composite material containing 26wt.% of total solid lubricants showed higher performance.

Scanning tunneling microscopy (STM) images indicate a change in tunnel current. The tunnel current strongly depends on the applied voltage between the specimen surface and a probe tip, and also on the work function of the specimen surface. Therefore, STM images are different from optical images. Under a certain applied voltage, the distribution of the work function on the surface is directly related to the image. In the present study, in order to understand the STM images obtained from the contact surface, example surfaces of Ag-Pd alloys with Mg and Cr additives were investigated by STM. The additives are easily oxidized, and their oxides distribute over the surface. Therefore, the effect of the additives on the STM images could be observed. For Ag-Pd-Cr, in the case of both clean and oxidized surfaces, the Cr oxides CrO and Cr2O3 formed on the surface are typical insulators, and sharp projections, such as needles, can be seen in the images which are very different from optical microscopy image. In addition, a high contact resistance was measured. On the other hand, for Ag-Pd-Mg, MgO formed on the surface was conductive, and a smooth surface was obtained, as evidenced by the STM image. Contact resistance was very low. Even if the oxides grew under heating, the same tendencies were observed. The conductivity of oxides on the surface had a great effect on the images obtained. A correlation between the contact resistance and the STM images was found.

Efficient extraction of interconnect parasitic parameters has become very important for present deep submicron designs. In this paper, the improved boundary element method (BEM) is presented for 3-D interconnect resistance extraction. The BEM is accelerated by the recently proposed quasi-multiple medium (QMM) technology, which quasi-cuts the calculated region to enlarge the sparsity of the overall coefficient matrix to solve. An un-average quasi-cutting scheme for QMM, advanced nonuniform element partition and technique of employing the linear element for some special surfaces are proposed. These improvements considerably condense the computational resource of the QMM-based BEM without loss of accuracy. Experiments on actual layout cases show that the presented method is several hundred to several thousand times faster than the well-known commercial software Raphael, while preserving the high accuracy.

Cryptographic unkeyed hash functions should satisfy preimage resistance, second-preimage resistance and collision resistance. In this article, weak second-preimage resistance and weak collision resistance are defined following the definition of weak one-wayness. Preimage resistance is one-wayness of cryptographic hash functions. The properties of weak collision resistance is discussed in this article. The same kind of results can be obtained for weak second-preimage resistance. Weak collision resistance means that the probability of failing to find a collision is not negligible, while collision resistance means that the success probability is negligible. It is shown that there really exist weakly collision resistant hash functions if collision resistant ones exist. Then, it is shown that weak collision resistance is amplifiable, that is, collision resistant hash functions can be constructed from weakly collision resistant ones. Unfortunately, the method of amplification presented in this article is applicable only to a certain kind of hash functions. However, the method is applicable to hash functions based on discrete logarithms. This implies that collision resistant hash functions can be obtained even if the discrete logarithm problem is much easier than is believed and only weakly intractable, that is, exponentiation modulo a prime is weakly one-way.

A low-power high-frequency sinusoidal quadrature oscillator is presented through a new RC technique using only CMOS current mirrors. The technique is relatively simple based on (1) internal capacitances of CMOS current mirrors and (2) a resistor of a CMOS current mirror for a negative resistance. Neither external capacitances nor inductances are required. As a particular example, a 2.4 GHz-0.4 mW, 0.325-fT, CMOS sinusoidal quadrature oscillator has been demonstrated. The power consumption is very low at approximately 0.4 mW. Total harmonic distortions (THD) are less than 0.3%. The oscillation frequency is current-tunable over a range of 540 MHz or 22%. The amplitude matching and the quadrature phase matching are better than 0.035 dB and 0.15, respectively. A figure of merit called a normalized carrier-to-noise ratio (CNRnorm) is 158.79 dBc/Hz at the 2 MHz offset from 2.46 GHz. Comparisons to other approaches are also presented.

In this presentation the authors consider in detail the problems relating to parameters like contact normal force, the effective contact areas and the surface plating, which have significant influence onto the surge current strength of electrical power contacts. Obtaining the behaviour of machine turned pin and socket contacts with different pin diameters the parameters of the active contact area radius, the constriction resistance and the constriction temperature are calculated by using FEM for elastic/plastic surface deformation. With the knowledge of the constriction radius the temperature curve of the contact area was determined by coupled electrical/thermal FE calculation. Laboratory tests were carried out in order to verify the FE-calculation.

Ag(40 wt%)-Pd(60 wt%) alloy has been widely applied to contact materials installed in various electromechanical devices. However, in application to the down sized relays, failure due to contact resistance is caused easily by both growth of oxide film on the contact surface and low contact force. To solve the increase in contact resistance, an overlay of thin Au or thin Au-Ag (8-10 wt%) has been used on the alloy. Despite this, cleanliness and low hardness of these overlays cause adhesion, or sticking, at contact interface. Increase in contact resistance and sticking are contrary to each other. In order to eliminate these contrary properties, the author studied improving the Ag-Pd alloy with a dopant. Low level of contact resistance for both static and dynamic contacts of Ag-Pd with Mg doping was found even if the contact surface was covered with an oxide contaminant film. This paper presents the excellent contact resistance and adhesion behaviors of Ag-Pd-Mg alloy and their mechanisms, and also presents in the later part, surface contamination behaviors for organic gases.

The three major failures of electrical contacts for automotive relay applications are: contact welding (or contact sticking), high contact resistance and severe contact erosion due to switching arcing. With the demand of high power and multiple functions of automotive vehicles, the switching current has be dramatically increased, it results in higher failing rate, in particular for contact welding. On the other hand, the miniaturization of electromechanical relays has lead to the reduction of mechanical spring force. This not only results in the earlier contact welding but also makes the relay more susceptible to the contact resistance and arc erosion failures. This paper is a review of most recent studies on these three failure aspects. It describes the progress in the understanding of contact welding caused by short arcing and high contact resistance due to contamination of particles and films in relay manufacturing process and also it review the material transfer due to switching arcing. At the end, the brief considerations of electromechanical relays used in 42 volts have also been given.