This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.
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Satoshi SHIGEMATSU, Hiroki MORIMURA, Katsuyuki MACHIDA, Yukio OKAZAKI, Hakaru KYURAGI, "Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 5, pp. 1070-1078, May 2005, doi: 10.1093/ietele/e88-c.5.1070.
Abstract: This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.5.1070/_p
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@ARTICLE{e88-c_5_1070,
author={Satoshi SHIGEMATSU, Hiroki MORIMURA, Katsuyuki MACHIDA, Yukio OKAZAKI, Hakaru KYURAGI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier},
year={2005},
volume={E88-C},
number={5},
pages={1070-1078},
abstract={This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.},
keywords={},
doi={10.1093/ietele/e88-c.5.1070},
ISSN={},
month={May},}
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TY - JOUR
TI - Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and Identifier
T2 - IEICE TRANSACTIONS on Electronics
SP - 1070
EP - 1078
AU - Satoshi SHIGEMATSU
AU - Hiroki MORIMURA
AU - Katsuyuki MACHIDA
AU - Yukio OKAZAKI
AU - Hakaru KYURAGI
PY - 2005
DO - 10.1093/ietele/e88-c.5.1070
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2005
AB - This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.
ER -