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Satoshi SHIGEMATSU Hiroki MORIMURA Katsuyuki MACHIDA Yukio OKAZAKI Hakaru KYURAGI
This paper describes pixel-parallel image-matching circuit schemes that provide the optimal binarization, the high-speed low-power comparison, and the accurate matching of fingerprint images needed for fingerprint verification. Image binarizing is adjusted adaptively during the fingerprint sensing operation. The obtained image is compared with the template in the pixel array, and the results from all of the pixels are totaled by a variable-delay circuit at high speed and low power. For accurate matching, the image is scanned by shifting it in the pixel array while maintaining whole image. The experimental results demonstrate that the proposed schemes provide optimal binary images of most fingers under any condition and environment, 11-µs 147-µW totaling of results from 20,584 pixels, and wide-range image scanning and accurate matching for fingerprint images. These schemes are effective for fast and low-power fingerprint verification for a single-chip fingerprint sensor and identifier.
Nobuhiro SHIMOYAMA Katsuyuki MACHIDA Masakazu SHIMAYA Hideo AKIYA Hakaru KYURAGI
This paper presents the effect of stress on device degradation in metal-oxide-semiconductor field-effect transistors (MOSFETs) due to stud bumping. Stud bumping above the MOSFET region generates interface traps at the Si/SiO2 interface and results in the degradation of transconductance in N-channel MOSFETs. The interface traps are apparently eliminated by both nitrogen and hydrogen annealing. However, the hot-carrier immunity after hydrogen annealing is one order of magnitude stronger than that after nitrogen annealing. This effect is explained by the termination of dangling bonds with hydrogen atoms.
Satoshi SHIGEMATSU Hiroki MORIMURA Toshishige SHIMAMURA Takahiro HATANO Namiko IKEDA Yukio OKAZAKI Katsuyuki MACHIDA Mamoru NAKANISHI
This paper describes logic and analog test schemes that improve the testability of a pixel-parallel fingerprint identification circuit. The pixel contains a processing circuit and a capacitive fingerprint sensor circuit. For the logic test, we propose a test method using a pseudo scan circuit to check the processing circuits of all pixels simultaneously. In the analog test, the sensor circuit employs dummy capacitance to mimic the state of a finger touching the chip. This enables an evaluation of the sensitivity of all sensor circuits on logical LSI tester without touching the chip with a finger. To check the effectiveness of the schemes, we applied them to a pixel array in a fingerprint identification LSI. The pseudo scan circuit achieved a 100% failure-detection rate for the processing circuit. The analog test determines that the sensitivities of the sensor circuit in all pixels are in the proper range. The results of the tests confirmed that the proposed schemes can completely detect defects in the circuits. Thus, the schemes will pave the way to logic and analog tests of chips integrating highly functional devices stacked on a LSI.
Satoshi SHIGEMATSU Koji FUJII Hiroki MORIMURA Takahiro HATANO Mamoru NAKANISHI Namiko IKEDA Toshishige SHIMAMURA Katsuyuki MACHIDA Yukio OKAZAKI Hakaru KYURAGI
This paper presents fingerprint image enhancement and rotation schemes that improve the identification accuracy with the pixel-parallel processing of pixels. In the schemes, the range of the fingerprint sensor is adjusted to the finger state, the captured image is retouched to obtain the suitable image for identification, and the image is rotated to the correct angle on the pixel array. Sensor and pixel circuits that provide these operations were devised and a test chip was fabricated using 0.25-µm CMOS and the sensor process. It was confirmed in 150,000 identification tests that the schemes reduce the false rejection rate to 6.17% from 30.59%, when the false acceptance rate is 0.1%.
Hiroki MORIMURA Satoshi SHIGEMATSU Toshishige SHIMAMURA Koji FUJII Chikara YAMAGUCHI Hiroki SUTO Yukio OKAZAKI Katsuyuki MACHIDA Hakaru KYURAGI
This paper describes an adaptive fingerprint-sensing scheme for a user authentication system with a fingerprint sensor LSI to obtain high-quality fingerprint images suitable for identification. The scheme is based on novel evaluation indexes of fingerprint-image quality and adjustable analog-to-digital (A/D) conversion. The scheme adjusts dynamically an A/D conversion range of the fingerprint sensor LSI while evaluating the image quality during real-time fingerprint-sensing operation. The evaluation indexes pertain to the contrast and the ridgelines of a fingerprint image. The A/D conversion range is adjusted by changing quantization resolution and offset. We developed a fingerprint sensor LSI and a user authentication system to evaluate the adaptive fingerprint-sensing scheme. The scheme obtained a fingerprint image suitable for identification and the system achieved an accurate identification rate with 0.36% of the false rejection rate (FRR) at 0.075% of the false acceptance rate (FAR). This confirms that the scheme is very effective in achieving accurate identification.