We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit ΣΔ-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-µm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications.
Masaru KOKUBO
Takashi KAWAMOTO
Takashi OSHIMA
Takayuki NOTO
Masato SUZUKI
Shigeyuki SUZUKI
Takashi HAYASAKA
Tomoaki TAKAHASHI
Jun KASAI
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Masaru KOKUBO, Takashi KAWAMOTO, Takashi OSHIMA, Takayuki NOTO, Masato SUZUKI, Shigeyuki SUZUKI, Takashi HAYASAKA, Tomoaki TAKAHASHI, Jun KASAI, "Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit ΣΔ Modulator-Controlled Fractional PLL" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 11, pp. 1682-1688, November 2006, doi: 10.1093/ietele/e89-c.11.1682.
Abstract: We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit ΣΔ-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-µm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.11.1682/_p
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@ARTICLE{e89-c_11_1682,
author={Masaru KOKUBO, Takashi KAWAMOTO, Takashi OSHIMA, Takayuki NOTO, Masato SUZUKI, Shigeyuki SUZUKI, Takashi HAYASAKA, Tomoaki TAKAHASHI, Jun KASAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit ΣΔ Modulator-Controlled Fractional PLL},
year={2006},
volume={E89-C},
number={11},
pages={1682-1688},
abstract={We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit ΣΔ-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-µm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications.},
keywords={},
doi={10.1093/ietele/e89-c.11.1682},
ISSN={1745-1353},
month={November},}
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TY - JOUR
TI - Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit ΣΔ Modulator-Controlled Fractional PLL
T2 - IEICE TRANSACTIONS on Electronics
SP - 1682
EP - 1688
AU - Masaru KOKUBO
AU - Takashi KAWAMOTO
AU - Takashi OSHIMA
AU - Takayuki NOTO
AU - Masato SUZUKI
AU - Shigeyuki SUZUKI
AU - Takashi HAYASAKA
AU - Tomoaki TAKAHASHI
AU - Jun KASAI
PY - 2006
DO - 10.1093/ietele/e89-c.11.1682
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2006
AB - We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit ΣΔ-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-µm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications.
ER -