In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor (SC) circuits, especially multiplying digital-to-analog converters (MDACs) in pipelined analog-to-digital converters. Theory and simulation results reveal that the settling time of MDACs can be decreased by optimizing the switch resistances. This switch resistance optimization does not only effectively increase the speed of single-bit MDACs, but also of multi-bit MDACs. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. With such an optimization, the response of the switch will be improved by up to 50%.
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Masaya MIYAHARA, Akira MATSUZAWA, "The Effects of Switch Resistances on Pipelined ADC Performances and the Optimization for the Settling Time" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 6, pp. 1165-1171, June 2007, doi: 10.1093/ietele/e90-c.6.1165.
Abstract: In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor (SC) circuits, especially multiplying digital-to-analog converters (MDACs) in pipelined analog-to-digital converters. Theory and simulation results reveal that the settling time of MDACs can be decreased by optimizing the switch resistances. This switch resistance optimization does not only effectively increase the speed of single-bit MDACs, but also of multi-bit MDACs. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. With such an optimization, the response of the switch will be improved by up to 50%.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.6.1165/_p
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@ARTICLE{e90-c_6_1165,
author={Masaya MIYAHARA, Akira MATSUZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={The Effects of Switch Resistances on Pipelined ADC Performances and the Optimization for the Settling Time},
year={2007},
volume={E90-C},
number={6},
pages={1165-1171},
abstract={In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor (SC) circuits, especially multiplying digital-to-analog converters (MDACs) in pipelined analog-to-digital converters. Theory and simulation results reveal that the settling time of MDACs can be decreased by optimizing the switch resistances. This switch resistance optimization does not only effectively increase the speed of single-bit MDACs, but also of multi-bit MDACs. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. With such an optimization, the response of the switch will be improved by up to 50%.},
keywords={},
doi={10.1093/ietele/e90-c.6.1165},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - The Effects of Switch Resistances on Pipelined ADC Performances and the Optimization for the Settling Time
T2 - IEICE TRANSACTIONS on Electronics
SP - 1165
EP - 1171
AU - Masaya MIYAHARA
AU - Akira MATSUZAWA
PY - 2007
DO - 10.1093/ietele/e90-c.6.1165
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2007
AB - In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor (SC) circuits, especially multiplying digital-to-analog converters (MDACs) in pipelined analog-to-digital converters. Theory and simulation results reveal that the settling time of MDACs can be decreased by optimizing the switch resistances. This switch resistance optimization does not only effectively increase the speed of single-bit MDACs, but also of multi-bit MDACs. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. With such an optimization, the response of the switch will be improved by up to 50%.
ER -