Superconducting Packet Switch

Mutsumi HOSOYA; Willy HIOE; Shin'ya KOMINAMI; Hideyuki NAGAISHI; Toshikazu NISHINO

Superconducting Packet Switch

Mutsumi HOSOYA, Willy HIOE, Shin'ya KOMINAMI, Hideyuki NAGAISHI, Toshikazu NISHINO

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This paper introduces a proto-type model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The contention solver checks for contention by comparing packet addresses while sorting the packets. The input buffer is used for waiting when contention occurs. The distribution network distributes packets which are guaranteed to be contention-free by the contention solver. The design of the proto-type has been completed and the operation has been numerically simulated and confirmed. The elementary circuits of the input buffer, the contention solver, and the distribution network are fabricated by standard Nb tri-layer process and the correct operations are confirmed.

Publication: IEICE TRANSACTIONS on Electronics Vol.E79-C No.9 pp.1186-1192

Publication Date: 1996/09/25

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Type of Manuscript: Special Section INVITED PAPER (Special Issue on Toward Digital and Analog Applications of Superconductors)

Category: Superconductive digital integrated circuits

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Mutsumi HOSOYA, Willy HIOE, Shin'ya KOMINAMI, Hideyuki NAGAISHI, Toshikazu NISHINO, "Superconducting Packet Switch" in IEICE TRANSACTIONS on Electronics, vol. E79-C, no. 9, pp. 1186-1192, September 1996, doi: .
Abstract: This paper introduces a proto-type model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The contention solver checks for contention by comparing packet addresses while sorting the packets. The input buffer is used for waiting when contention occurs. The distribution network distributes packets which are guaranteed to be contention-free by the contention solver. The design of the proto-type has been completed and the operation has been numerically simulated and confirmed. The elementary circuits of the input buffer, the contention solver, and the distribution network are fabricated by standard Nb tri-layer process and the correct operations are confirmed.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e79-c_9_1186/_p

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@ARTICLE{e79-c_9_1186,
author={Mutsumi HOSOYA, Willy HIOE, Shin'ya KOMINAMI, Hideyuki NAGAISHI, Toshikazu NISHINO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Superconducting Packet Switch},
year={1996},
volume={E79-C},
number={9},
pages={1186-1192},
abstract={This paper introduces a proto-type model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The contention solver checks for contention by comparing packet addresses while sorting the packets. The input buffer is used for waiting when contention occurs. The distribution network distributes packets which are guaranteed to be contention-free by the contention solver. The design of the proto-type has been completed and the operation has been numerically simulated and confirmed. The elementary circuits of the input buffer, the contention solver, and the distribution network are fabricated by standard Nb tri-layer process and the correct operations are confirmed.},
keywords={},
doi={},
ISSN={},
month={September},}

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TY - JOUR
TI - Superconducting Packet Switch
T2 - IEICE TRANSACTIONS on Electronics
SP - 1186
EP - 1192
AU - Mutsumi HOSOYA
AU - Willy HIOE
AU - Shin'ya KOMINAMI
AU - Hideyuki NAGAISHI
AU - Toshikazu NISHINO
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1996
AB - This paper introduces a proto-type model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The contention solver checks for contention by comparing packet addresses while sorting the packets. The input buffer is used for waiting when contention occurs. The distribution network distributes packets which are guaranteed to be contention-free by the contention solver. The design of the proto-type has been completed and the operation has been numerically simulated and confirmed. The elementary circuits of the input buffer, the contention solver, and the distribution network are fabricated by standard Nb tri-layer process and the correct operations are confirmed.
ER -