A C-Ku Band 5-Bit MMIC Phase Shifter Using Optimized Reflective Series/Parallel LC Circuits

Kenichi MIYAGUCHI; Morishige HIEDA; Yukinobu TARUI; Mikio HATAMOTO; Koh KANAYA; Yoshitada IYAMA; Tadashi TAKAGI; Osami ISHIDA

A C-Ku Band 5-Bit MMIC Phase Shifter Using Optimized Reflective Series/Parallel LC Circuits

Kenichi MIYAGUCHI, Morishige HIEDA, Yukinobu TARUI, Mikio HATAMOTO, Koh KANAYA, Yoshitada IYAMA, Tadashi TAKAGI, Osami ISHIDA

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A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.

Publication: IEICE TRANSACTIONS on Electronics Vol.E86-C No.12 pp.2429-2436

Publication Date: 2003/12/01

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Type of Manuscript: Special Section PAPER (Special Issue on Recent Trends on Microwave and Millimeter Wave Application Technology)

Category: Active(Phase Shifter)

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Kenichi MIYAGUCHI, Morishige HIEDA, Yukinobu TARUI, Mikio HATAMOTO, Koh KANAYA, Yoshitada IYAMA, Tadashi TAKAGI, Osami ISHIDA, "A C-Ku Band 5-Bit MMIC Phase Shifter Using Optimized Reflective Series/Parallel LC Circuits" in IEICE TRANSACTIONS on Electronics, vol. E86-C, no. 12, pp. 2429-2436, December 2003, doi: .
Abstract: A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e86-c_12_2429/_p

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@ARTICLE{e86-c_12_2429,
author={Kenichi MIYAGUCHI, Morishige HIEDA, Yukinobu TARUI, Mikio HATAMOTO, Koh KANAYA, Yoshitada IYAMA, Tadashi TAKAGI, Osami ISHIDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A C-Ku Band 5-Bit MMIC Phase Shifter Using Optimized Reflective Series/Parallel LC Circuits},
year={2003},
volume={E86-C},
number={12},
pages={2429-2436},
abstract={A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - A C-Ku Band 5-Bit MMIC Phase Shifter Using Optimized Reflective Series/Parallel LC Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 2429
EP - 2436
AU - Kenichi MIYAGUCHI
AU - Morishige HIEDA
AU - Yukinobu TARUI
AU - Mikio HATAMOTO
AU - Koh KANAYA
AU - Yoshitada IYAMA
AU - Tadashi TAKAGI
AU - Osami ISHIDA
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E86-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2003
AB - A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.
ER -