Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning

JeeYoung HONG; Daisuke IMANISHI; Kenichi OKADA; Akira MATSUZAWA

doi:10.1587/transele.E95.C.290

Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning

JeeYoung HONG, Daisuke IMANISHI, Kenichi OKADA, Akira MATSUZAWA

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This paper presents two CMOS power amplifiers which realize frequency band selection. Each PA consists of two stages and uses a transformer to obtain large output power with high efficiency. Furthermore, the capacitive cross-coupling at the second stage reduces a die area of the bypass capacitance. The proposed PAs are fabricated by a 0.18 µm CMOS process. With a 3.3 V supply, the PAs achieve a output 1-dB compression point of larger than 25 dBm from 2.2 GHz to 5.4 GHz, maximum of peak power added efficiency (PAE_peak) are 30% and 27% for 2-band and 3-band PAs, respectively. The proposed PAs have advantages which are a band-selectable ability within a desired frequency range and a realization of CMOS PA with high power efficiency.

Publication: IEICE TRANSACTIONS on Electronics Vol.E95-C No.2 pp.290-296

Publication Date: 2012/02/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E95.C.290

Type of Manuscript: PAPER

Category: Electronic Circuits

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JeeYoung HONG, Daisuke IMANISHI, Kenichi OKADA, Akira MATSUZAWA, "Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning" in IEICE TRANSACTIONS on Electronics, vol. E95-C, no. 2, pp. 290-296, February 2012, doi: 10.1587/transele.E95.C.290.
Abstract: This paper presents two CMOS power amplifiers which realize frequency band selection. Each PA consists of two stages and uses a transformer to obtain large output power with high efficiency. Furthermore, the capacitive cross-coupling at the second stage reduces a die area of the bypass capacitance. The proposed PAs are fabricated by a 0.18 µm CMOS process. With a 3.3 V supply, the PAs achieve a output 1-dB compression point of larger than 25 dBm from 2.2 GHz to 5.4 GHz, maximum of peak power added efficiency (PAE_peak) are 30% and 27% for 2-band and 3-band PAs, respectively. The proposed PAs have advantages which are a band-selectable ability within a desired frequency range and a realization of CMOS PA with high power efficiency.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.290/_p

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@ARTICLE{e95-c_2_290,
author={JeeYoung HONG, Daisuke IMANISHI, Kenichi OKADA, Akira MATSUZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning},
year={2012},
volume={E95-C},
number={2},
pages={290-296},
abstract={This paper presents two CMOS power amplifiers which realize frequency band selection. Each PA consists of two stages and uses a transformer to obtain large output power with high efficiency. Furthermore, the capacitive cross-coupling at the second stage reduces a die area of the bypass capacitance. The proposed PAs are fabricated by a 0.18 µm CMOS process. With a 3.3 V supply, the PAs achieve a output 1-dB compression point of larger than 25 dBm from 2.2 GHz to 5.4 GHz, maximum of peak power added efficiency (PAE_peak) are 30% and 27% for 2-band and 3-band PAs, respectively. The proposed PAs have advantages which are a band-selectable ability within a desired frequency range and a realization of CMOS PA with high power efficiency.},
keywords={},
doi={10.1587/transele.E95.C.290},
ISSN={1745-1353},
month={February},}

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TY - JOUR
TI - Two-Stage Band-Selectable CMOS Power Amplifiers Using Inter-Stage Frequency Tuning
T2 - IEICE TRANSACTIONS on Electronics
SP - 290
EP - 296
AU - JeeYoung HONG
AU - Daisuke IMANISHI
AU - Kenichi OKADA
AU - Akira MATSUZAWA
PY - 2012
DO - 10.1587/transele.E95.C.290
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2012
AB - This paper presents two CMOS power amplifiers which realize frequency band selection. Each PA consists of two stages and uses a transformer to obtain large output power with high efficiency. Furthermore, the capacitive cross-coupling at the second stage reduces a die area of the bypass capacitance. The proposed PAs are fabricated by a 0.18 µm CMOS process. With a 3.3 V supply, the PAs achieve a output 1-dB compression point of larger than 25 dBm from 2.2 GHz to 5.4 GHz, maximum of peak power added efficiency (PAE_peak) are 30% and 27% for 2-band and 3-band PAs, respectively. The proposed PAs have advantages which are a band-selectable ability within a desired frequency range and a realization of CMOS PA with high power efficiency.
ER -