Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate

Hiroyuki OGATA; Kenji ICHIJO; Kenji KONDO; Akito HARA

doi:10.1587/transele.E96.C.285

Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate

Hiroyuki OGATA, Kenji ICHIJO, Kenji KONDO, Akito HARA

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A multigate polycrystalline-silicon (poly-Si) thin-film transistor (TFT) is a recently popular topic in the field of Si devices. In this study, self-aligned planar metal double-gate poly-Si TFTs consisting of an embedded bottom metal gate, a top metal gate fabricated by a self-alignment process, and a lateral poly-Si film with a grain size greater than 2 µm were fabricated on a glass substrate at 550. The nominal field-effect mobility of an n-channel TFT is 530 cm²/Vs, and its subthreshold slope is 140 mV/dec. The performance of the proposed TFTs is superior to that of top-gate TFTs fabricated using equivalent processes.

Publication: IEICE TRANSACTIONS on Electronics Vol.E96-C No.2 pp.285-288

Publication Date: 2013/02/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E96.C.285

Type of Manuscript: BRIEF PAPER

Category: Semiconductor Materials and Devices

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Hiroyuki OGATA, Kenji ICHIJO, Kenji KONDO, Akito HARA, "Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate" in IEICE TRANSACTIONS on Electronics, vol. E96-C, no. 2, pp. 285-288, February 2013, doi: 10.1587/transele.E96.C.285.
Abstract: A multigate polycrystalline-silicon (poly-Si) thin-film transistor (TFT) is a recently popular topic in the field of Si devices. In this study, self-aligned planar metal double-gate poly-Si TFTs consisting of an embedded bottom metal gate, a top metal gate fabricated by a self-alignment process, and a lateral poly-Si film with a grain size greater than 2 µm were fabricated on a glass substrate at 550. The nominal field-effect mobility of an n-channel TFT is 530 cm²/Vs, and its subthreshold slope is 140 mV/dec. The performance of the proposed TFTs is superior to that of top-gate TFTs fabricated using equivalent processes.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.285/_p

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@ARTICLE{e96-c_2_285,
author={Hiroyuki OGATA, Kenji ICHIJO, Kenji KONDO, Akito HARA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate},
year={2013},
volume={E96-C},
number={2},
pages={285-288},
abstract={A multigate polycrystalline-silicon (poly-Si) thin-film transistor (TFT) is a recently popular topic in the field of Si devices. In this study, self-aligned planar metal double-gate poly-Si TFTs consisting of an embedded bottom metal gate, a top metal gate fabricated by a self-alignment process, and a lateral poly-Si film with a grain size greater than 2 µm were fabricated on a glass substrate at 550. The nominal field-effect mobility of an n-channel TFT is 530 cm²/Vs, and its subthreshold slope is 140 mV/dec. The performance of the proposed TFTs is superior to that of top-gate TFTs fabricated using equivalent processes.},
keywords={},
doi={10.1587/transele.E96.C.285},
ISSN={1745-1353},
month={February},}

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TY - JOUR
TI - Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate
T2 - IEICE TRANSACTIONS on Electronics
SP - 285
EP - 288
AU - Hiroyuki OGATA
AU - Kenji ICHIJO
AU - Kenji KONDO
AU - Akito HARA
PY - 2013
DO - 10.1587/transele.E96.C.285
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2013
AB - A multigate polycrystalline-silicon (poly-Si) thin-film transistor (TFT) is a recently popular topic in the field of Si devices. In this study, self-aligned planar metal double-gate poly-Si TFTs consisting of an embedded bottom metal gate, a top metal gate fabricated by a self-alignment process, and a lateral poly-Si film with a grain size greater than 2 µm were fabricated on a glass substrate at 550. The nominal field-effect mobility of an n-channel TFT is 530 cm²/Vs, and its subthreshold slope is 140 mV/dec. The performance of the proposed TFTs is superior to that of top-gate TFTs fabricated using equivalent processes.
ER -